Capturing Video in Raw Data Mode / Capturing Data in TSI Capture Mode

3.11.1 Handling FIFO Overrun Condition in Raw Data Mode

In case of a FIFO overrun, the COVRx bit is set in VPIS. This condition initiates an interrupt to the DSP, if the overrun interrupt is enabled (setting the COVRx bit in VPIE enables overrun interrupt).

The overrun interrupt routine should set the BLKCAP bit in VCxCTL and it should reconfigure DMA channel settings. The DMA channel must be reconfi- gured for capture of the next frame since the current frame transfer failed. Set- ting the BLKCAP bit flushes the capture FIFO and blocks DMA events for the channel. As long as the BLKCAP bit is set, the video capture channel ignores the incoming data but the internal data counter continues counting.

The BLKCAP bit should be cleared to 0 in order to continue capture. Clearing the BLKCAP bit takes effect in the subsequent frame after a raw data sync period is detected on CAPENx. (DMA events are still going to be blocked in the frame in which the BLKCAP bit is cleared.)

3.12 Capturing Data in TSI Capture Mode

In order to capture data in TSI capture mode, the following steps are needed:

1)Set VCASTOP1 to specify size of a data packet to be captured (VCXSTOP sets the lower 12 bits and VCYSTOP sets the upper 12 bits of the data packet).

2)Write to VCxTHRLD to set the capture threshold to the data packet size. Every time the number of received bytes reaches the number specified by the VCTHRLD1 bits, a YEVTx is generated by the video capture module.

3)Configure a DMA channel to move data from YSRCA to a destination in the DSP memory. The channel transfers should be triggered by the VIDEVTA. The size of the transfers should be set to the data packet size + 8 bytes of timestamp information. The DMA must start on a double- word boundary and move an even number of words.

4)Write to TSICTL to:

-Set TSI capture mode (TCMODE = 0 for parallel data, 1 for serial data)

-Select counter mode (TCMODE)

-Enable error packet filtering (ERRFILT) if desired

5)In Sigma-Delta peripheral:

-Write to the SDCTL register to set the precision for the Sigma Delta module.

-Write to the SDDIV register to set the divider value Sigma Delta inter- polation frequency.

SPRU629

Video Capture Port

3-47

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Texas Instruments TMS320C64x DSP Capturing Data in TSI Capture Mode, Handling Fifo Overrun Condition in Raw Data Mode
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TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.
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