Texas Instruments TMS320C64x DSP specification

Example 2: Noncontinuous Frame Display for 525/60 Format

/* ––––––––––––––––––––––––––––––––––––––––––––––––– / / Define vertical blanking bit(VD_VBITn) reg values / / ––––––––––––––––––––––––––––––––––––––––––––––––– */

#define VD_VBIT_SET1	1 /* first line with an EAV with V=1		*/
		/* indicating the start of Field1	*/
		/* vertical blanking	*/
#define VD_VBIT_CLR1	20	/* first line with an EAV with V=0	*/
		/* indicating the start of Field1	*/
		/* active display	*/
#define VD_VBLNK1_SIZE	(VD_VBIT_CLR1 – VD_VBIT_SET1) /* 19 lines		*/
#define VD_VBIT_SET2	264	/* first line with an EAV with V=1	*/
		/* indicating the start of Field2	*/
		/* vertical blanking	*/
#define VD_VBIT_CLR2	283	/* first line with an EAV with V=0	*/
		/* indicating the start of Field2	*/
		/* active display	*/
#define VD_VBLNK2_SIZE	(VD_VBIT_CLR2 – VD_VBIT_SET2) /* 19 lines		*/
/* –––––––––––– */
/* Field timing */
/* –––––––––––– */
#define VD_FIELD1_XSTART	720	/* pixel on the first line of	*/
		/* Field1 on which FLD ouput	*/
		/* is de–asserted	*/
#define VD_FIELD1_YSTART	1 /* line on which FLD is de–asserted		*/
#define VD_FIELD1_XSTART	360	/* pixel on the first line of	*/
		/* Field1 on which FLD ouput	*/
		/* is asserted	*/
#define VD_FIELD1_YSTART	263	/* line on which FLD is asserted	*/
/* –––––––––––––––––––––––––––––––––––– */
/* Define field bit(VD_FBIT) reg values */
/* –––––––––––––––––––––––––––––––––––– */
#define VD_FBIT_CLR	4 /* first line with an EAV with F=0		*/
		/* indicating Field 1 display	*/
#define VD_FBIT_SET	266	/* first line with an EAV with F=1	*/
		/* indicating Field 2 display	*/
/* –––––––––––––––––––––––––––––––– */
/* Define horzontal synchronization */
/* –––––––––––––––––––––––––––––––– */
#define VD_HSYNC_START	736
#define VD_HSYNC_STOP	800
/* –––––––––––––––––––––––––––––––––––––––––– */
/* Define vertical synchronization for field1 */
/* –––––––––––––––––––––––––––––––––––––––––– */
#define VD_VSYNC_XSTART1	720
#define VD_VSYNC_YSTART1	4
#define VD_VSYNC_XSTOP1	720
#define VD_VSYNC_YSTOP1	7

SPRU629

Video Port Configuration Examples

A-11

TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.

Texas Instruments TMS320C64x DSP manual Define vertical blanking bitVDVBITn reg values

Models: TMS320C64x DSP

SPRU629

TMS320C64x DSP specifications