Texas Instruments TMS320C64x DSP instruction

GPIO Registers

5.1.7Video Port Pin Data Set Register (PDSET)

The video port pin data set register (PDSET) is shown in Figure 5–7 and described in Table 5–8. PDSET is an alias of the video port pin data output reg- ister (PDOUT) for writes only and provides an alternate means of driving GPIO outputs high. Writing a 1 to a bit of PDSET sets the corresponding bit in PDOUT. Writing a 0 has no effect. Register reads return all 0s.

Figure 5–7. Video Port Pin Data Set Register (PDSET)

31								24
			Reserved

				R-0
23	22	21	20	19		18	17	16

Reserved	PDSET22	PDSET21	PDSET20		PDSET19	PDSET18	PDSET17	PDSET16

R-0	W-0	W-0	W-0		W-0	W-0	W-0	W-0
15	14	13	12	11		10	9	8

PDSET15	PDSET14	PDSET13	PDSET12		PDSET11	PDSET10	PDSET9	PDSET8

W-0	W-0	W-0	W-0		W-0	W-0	W-0	W-0
7	6	5	4	3		2	1	0

PDSET7	PDSET6	PDSET5	PDSET4		PDSET3	PDSET2	PDSET1	PDSET0

W-0	W-0	W-0	W-0		W-0	W-0	W-0	W-0

Legend: R = Read only; W = Write only; -n= value after reset

SPRU629

General Purpose I/O Operation

5-15

TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.

Texas Instruments TMS320C64x DSP manual Video Port Pin Data Set Register Pdset

Models: TMS320C64x DSP

5.1.7Video Port Pin Data Set Register (PDSET)

Figure 5–7. Video Port Pin Data Set Register (PDSET)

SPRU629

TMS320C64x DSP specifications