Raw Data Capture Mode

The 8-bit raw-data mode stores all data in a single FIFO. Four samples are packed into each word as shown in Figure 3–17.

Figure 3–17. 8-Bit Raw Data FIFO Packing

VCLKINA / VCLKINB

 

VDIN[9–2] / VDIN[19–12]

Raw 0 Raw 1 Raw 2 Raw 3 Raw 4 Raw 5 Raw 6 Raw 7 Raw 8 Raw 9 Raw 10

Raw 11

 

 

63

5655

4847

4039

3231

2423

1615

8 7

0

 

 

 

Raw 15

 

Raw 14

 

Raw 13

 

Raw 12

 

Raw 11

 

Raw 10

 

Raw 9

 

Raw 8

Raw FIFO

 

Raw 7

 

Raw 6

 

Raw 5

 

Raw 4

 

Raw 3

 

Raw 2

 

Raw 1

 

Raw 0

 

 

 

 

 

 

 

 

Little-Endian Packing

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

63

5655

4847

4039

3231

2423

1615

8 7

0

 

 

 

Raw 8

 

Raw 9

 

Raw 10

 

Raw 11

 

Raw 12

 

Raw 13

 

Raw 14

 

Raw 15

Raw FIFO

 

Raw 0

 

Raw 1

 

Raw 2

 

Raw 3

 

Raw 4

 

Raw 5

 

Raw 6

 

Raw 7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Big-Endian Packing

The 10-bit raw data mode stores all data into a single FIFO. Two samples are packed into each word with zero or sign extension as shown in Figure 3–18.

Figure 3–18. 10-Bit Raw Data FIFO Packing

VCLKINA / VCLKINB

VDIN[9–0] / VDIN[19–10]

Raw 0 Raw 1 Raw 2 Raw 3 Raw 4 Raw 5 Raw 6 Raw 7 Raw 8 Raw 9 Raw 10 Raw 11

Y FIFO

63

58 57

48 47

42 41

3231

26 25

16 15

10 9

0

0 / SE

 

Raw 15

 

0 / SE

 

Raw 14

 

0 / SE

 

Raw 13

 

 

0 / SE

 

Raw 12

0 / SE

 

Raw 11

 

0 / SE

 

Raw 10

 

0 / SE

 

Raw 9

 

 

0 / SE

 

Raw 8

0 / SE

 

Raw 7

 

0 / SE

 

Raw 6

 

0 / SE

 

Raw 5

 

 

0 / SE

 

Raw 4

0 / SE

 

Raw 3

 

0 / SE

 

Raw 2

 

0 / SE

 

Raw 1

 

 

0 / SE

 

Raw 0

Little-Endian Packing

Y FIFO

63

58 57

48 47

42 41

3231

26 25

16 15

10 9

0

0 / SE

 

Raw 12

 

0 / SE

 

Raw 13

 

0 / SE

 

Raw 14

 

 

0 / SE

 

Raw 15

0 / SE

 

Raw 8

 

0 / SE

 

Raw 9

 

0 / SE

 

Raw 10

 

 

0 / SE

 

Raw 11

0 / SE

 

Raw 4

 

0 / SE

 

Raw 5

 

0 / SE

 

Raw 6

 

 

0 / SE

 

Raw 7

0 / SE

 

Raw 0

 

0 / SE

 

Raw 1

 

0 / SE

 

Raw 2

 

 

0 / SE

 

Raw 3

Big-Endian Packing

3-34

Video Capture Port

SPRU629

Page 95 Page 97
Page 96
Image 96
Texas Instruments TMS320C64x DSP manual Bit Raw Data Fifo Packing
Page 95 Page 97

TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.
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