Digi NS9215 manual H a n c e d P W M f u n c t i o n, A d r a t u r e d e code r f u n c t i o n

S Y S T E M C O N T RO L M O D U L E

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Enhanced PWM function. .

E n h a n c e d P W M f u n c t i o n

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Timer counters 6–9 have additional features to add enhanced PWM functionality: High register — Compared to the timer/counter to toggle PWM output high Low register — Compared to the timer/counter to toggle PWM output back low

Three 15-bit Step registers associated with four enhanced timer/counters. The values of Step registers are added when the high, low, and reload values are reached, which allows a steadily variable motor control PWM wave to be generated. The enhanced PWM function is output through GPIO through the functions labeled Ext Timer Event Out Ch N for channels 6 to 9.

Sample enhanced

PWM waveform

Reload Value	High Value		High Value	Terminal Count
FFFF_0000	FFFF_7000		FFFF_B000	FFFF_FFFF
Timer Counter clock frequency		75MHz
PWMperiod		873.000 usec
Low time 1		382.293 usec
High time		218.453 usec
Low time 2		272.254 usec

Q u a d r a t u r e d e c o d e r f u n c t i o n

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The processor provides a quadrature decoder function to allow the CPU to determine the external device rate of rotation and the direction of rotation. Example applications are robotic axles for feedback control, mechanical knobs to determine user input, and in computer mice, to determine direction of movement.

One timer/counter will include a quadrature decoder function, which takes some computational load off the CPU. When a CPU reads the output signals of a quadrature encoder, every state must be decoded and a counter needs to be updated based on the interpretation of the states. For example, for an encoder of 256 pulses per revolution turning at a modest 6000 rpm, the CPU needs to find and decoded 102,400 state changes per second and update the counter accordingly. With an x8 sampling rate, the CPU needs to sample the input about 8 x 102,400 timer per second. This consumes a significant portion of the CPU bandwidth.

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