Digi manual Hardware Reference NS9215

Buffer length	340
Destination address [pointer]	340
Status	341
Wrap (W) bit	341
Interrupt (I) bit	341
Last (L) bit	341
Full (F) bit	341
Descriptor list processing	341
Peripheral DMA read access	342
Determining the width of PDEN	342
Equation variables	342
Peripheral DMA single read access	343
Peripheral DMA burst read access	343
Peripheral DMA write access	343
Determining the width of PDEN	344
Peripheral DMA single write access	344
Peripheral DMA burst write access	344
Peripheral REQ and DONE signaling	344
REQ signal	344
DONE signal	345
Special circumstances	345
Static RAM chip select configuration	345
Static ram chip select configuration	345
Control and Status registers	346
Register address map	346
DMA Buffer Descriptor Pointer	346
DMA Control register	347
DMA Status and Interrupt Enable register	350
DMA Peripheral Chip Select register	352
C h a p t e r 8 : A E S D a t a E n c r y p t i o n / D e c r y p t i o n M o d u l e	355
Features	355
Block diagram	356
Data blocks	356
AES DMA buffer descriptor	356
AES buffer descriptor diagram	357
Source address [pointer]	357
Source buffer length	357
Destination buffer length	357
Destination address [pointer]	357
AES control	357
AES op code	358
WRAP (W) bit	358
Interrupt (I) bit	358

18Hardware Reference NS9215