Digi NS9215 manual Software, Receive character-based flow control, Remote loopback, RTS control

S E R I A L C O N T RO L M O D U L E : U A RT

Wrapper Configuration register

Bits	Access	Mnemonic	Reset	Description
D17	R/W	RXFLUSH	0	Resets the contents of the 64-byte RXFIFO.
				Write a 1, then a 0 to reset the FIFO.
D16	R/W	TXFLUSH	N/A	Resets the contents of the 64-byte TX FIFO.
				Write a 1, then a 0 to reset the FIFO.
D15:14	R	RXBYTES	00	Indicates how many bytes are pending in the wrapper.
				The wrapper writes to the RX FIFO only when 4 bytes are
				received or a buffer close event occurs, such as a
				character gap timeout, character match, or error.
D13	R/W	RXCLOSE	0	Allows software to close a receive buffer. Hardware
				clears this bit when the buffer has been closed.
				0	Idle or buffer already closed
				1	Software initiated buffer close
D12	N/A	Reserved	N/A	N/A
D11:06	R/W	TXFLOW	010000	Selects which signals are routed to the UART for
				hardware flow control. Transmit data is halted when the
				selected signal is deasserted.
				[0]	CTS
				0	CTS disabled
				1	CTS enabled
				[1]	DCD
				0	DCD disabled
				1	DCD enabled
				[2]	DSR
				0	DSR disabled
				1	DSR enabled
				[3]	RI
				0	RI disabled
				1	RI enabled
				[4]	Software
				0	TX disabled
				1	TX enabled
				[5]	Receive character-based flow control
				0	Disabled
				1	Enabled
D05	R/W	RL	0	Remote loopback
				Provides an internal remote loopback feature. When the
				RL field is set to 1, the receive serial data signal is
				connected to the transmit serial data signal.
				A local loopback is provided in the UART.
D04	R/W	RTS	0	RTS control
				0	Controlled directly by UART
				1	Deasserted when RX FIFO is half full

392Hardware Reference NS9215