Digi NS9215 manual I c o n t r o l l e r, SPI module structure

S E R I A L C O N T RO L M O D U L E : S P I

SPI controller

SPI module structure

		spi tx d	spi clk out	spi cs out n	spi cs in n		spi rx d	spi cs in n	spi clk in
						spi_tx_d	Receive
			Transmit			spi_clk_out
			State				State
			Machine			spi_cs_out_n	Machine
sys_pll_out	Clock	spi_clk
	Generation
AHB Bus			Transmit				Receive
	Config		Fifo					Fifo
			Interface				Interface
	spi irq	valid	be[1:0]	data[31:0]	read	write	be[1:0]	status[6:0]	data[31:0]

S P I c o n t r o l l e r

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Simple parallel/serial data conversion

Full duplex operation

The SPI controller provides a full-duplex, synchronous, character-oriented data channel between master and slave devices, using a four-wire interface (RXD, TXD, CLK, CS#). The master interface operates in a broadcast mode. The slave interface is activated using the CS# signal. You can configure the master interface to address various slave interfaces using the GPIO pins.

SPI provides simple parallel/serial data conversion to stream serial data between memory and a peripheral. The SPI port has no protocol associated with it other than transferring information in multiples of 8 bits.

The SPI port can operate in full-duplex mode. Information transfer is controlled by a single clock signal. The clock and chip select signals are chip outputs for a master mode operation and inputs for a slave mode operation.

434Hardware Reference NS9215