Digi NS9215 manual Addresses A09001F8 / 01FC, Chip select 0 mask

S Y S T E M C O N T RO L M O D U L E

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System Memory Chip Select 1 Static Memory Base and Mask registers. .

Registers

31		30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
							Chip select 0 base (CS0B)
15		14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	Chip select 0 base (CS0B)									Reserved
31		30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
							Chip select 0 mask (CS0M)
15		14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	Chip select 0 mask (CS0M)									Reserved						CSD0

Register bit

assignment	Bits	Access	Mnemonic	Reset	Description
					Chip select 0 base
	D31:12	R/W	CS0B	0x40000
					Base address for chip select 0.
	D11:00	N/A	Reserved	N/A	N/A
	D31:12	R/W	CS0M	0xF0000	Chip select 0 mask
					Mask or size for chip select 0.
	D11:01	N/A	Reserved	N/A	N/A
	D00	R/W	CSD0	0x1	Chip select 0 disable
					0	Disable chip select
					1	Enable chip select

S y s t e m M e m o r y C h i p S e l e c t 1 S t a t i c M e m o r y B a s e a n d M a s k r e g i s t e r s

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Addresses: A09001F8 / 01FC

These control registers set the base and mask for system memory chip select 1, with a minimum size of 4K. The powerup default settings produce a memory range of 0x5000 0000 — 0x5FFF FFFF.

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