Digi NS9215 manual Translation sequence for large page references

Models: NS9215

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Translation sequence for large page references

WO R K I N G W I T H T H E C P U

MemoryManagement Unit (MMU)

 

Modified virtual address

 

31

2019

1615

12 11

0

 

 

 

 

 

 

 

Table index

 

 

 

 

Page

index

table index

 

 

 

 

 

Translation table base

 

 

 

 

 

 

31

 

14 13

 

 

 

 

 

0

Translation base

 

 

 

 

 

 

 

 

31

 

14 13

 

 

 

2

1 0

Translation base

 

Table index

 

 

0

0

First-level descriptor

 

 

 

 

 

 

31

 

10 9

8

5 4

3

2

1 0

Coarse page table base address

Domain 1

 

 

0

1

31

 

10 9

 

 

 

2

1

0

Coarse page table base address

L2 table index

 

0

0

Second-level descriptor

 

 

 

 

 

 

31

1615

121110 9

8 7 6

5 4

3 2

1

0

Page base address

 

AP3 AP2 AP1 AP0 C B 0 1

Physical address

 

 

 

 

 

 

31

1615

 

 

 

 

 

 

0

Page base address

Page index

Because the upper four bits of the page index and low-order four bits of the coarse page table index overlap, each coarse page table entry for a large page must be duplicated 16 times (in consecutive memory locations) in the coarse page table.

If the large page descriptor is included in a fine page table, the high-order six bits of the page index and low-order six bits of the fine page table overlap. Each fine page table entry for a large page must be duplicated 64 times.

116Hardware Reference NS9215

Page 116
Image 116
Digi NS9215 manual Translation sequence for large page references