Digi NS9215 manual Addresses A090 01F0 / 01F4, Chip select 3 base, Chip select 3 disable

S Y S T E M C O N T RO L M O D U L E

System Memory Chip Select 0 Static Memory Base and Mask registers

Registers

	31		30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
								Chip select 3 base (CS3B)
	15		14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
		Chip select 3 base (CS3B)									Reserved
	31		30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
								Chip select 3 mask (CS3M)
	15		14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
		Chip select 3 mask (CS3M)									Reserved						CSD3
Register bit
assignment	Bits			Access		Mnemonic		Reset		Description
										Chip select 3 base
	D31:12			R/W	CS3B			0x30000
										Base address for chip select 3
	D11:00			N/A	Reserved			N/A		N/A
	D31:12			R/W	CS3M			0xF0000		Chip select 3 mask
										Mask or size for chip select 3
	D11:01			N/A	Reserved			N/A		N/A
	D00			R/W	CSD3			0x1		Chip select 3 disable
										0	Disable chip select
										1	Enable chip select

S y s t e m M e m o r y C h i p S e l e c t 0 S t a t i c M e m o r y B a s e a n d M a s k r e g i s t e r s

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Addresses: A090 01F0 / 01F4

These control registers set the base and mask for system memory chip select 0, with a minimum size of 4K. The powerup default settings produce a memory range of 0x4000 0000 — 0x4FFF FFFF.

194Hardware Reference NS9215