Digi NS9215 manual Address mapping, For the Dynamic, Memory Configuration, Description

Models: NS9215

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M E M O R Y C O N T RO L L E R

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Dynamic Memory Configuration 0–3 registers..

 

 

 

 

 

 

 

 

.

Address mapping

The next table shows address mapping for the Dynamic Memory Configuration 0-3

 

 

for the Dynamic

registers. Address mappings that are not shown in the table are reserved.

 

 

Memory

 

 

 

 

 

 

 

 

 

Configuration

[14]

[12]

[11:9]

[8:7]

Description

 

 

registers

 

 

 

 

 

 

 

 

 

16-bit external bus high-performance address mapping (row, bank column)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

0

000

00

16

Mb (2Mx8), 2 banks, row length=11, column length=9

 

 

 

 

 

 

 

 

 

 

 

 

0

0

000

01

16

Mb (1Mx16), 2 banks, row length=11, column length=8

 

 

 

 

 

 

 

 

 

 

 

 

0

0

001

00

64

Mb (8Mx80, 4 banks, row length=12, column length=9

 

 

 

 

 

 

 

 

 

 

 

 

0

0

001

01

64

Mb (4Mx16), 4 banks, row length=12, column length=8

 

 

 

 

 

 

 

 

 

 

 

 

0

0

010

00

128

Mb (16Mx8), 4 banks, row length=12, column length=10

 

 

 

 

 

 

 

 

 

 

 

 

0

0

010

01

128

Mb (8Mx16), 4 banks, row length=12, column length=9

 

 

 

 

 

 

 

 

 

 

 

 

0

0

011

00

256

Mb (32Mx8), 4 banks, row length=13, column length=10

 

 

 

 

 

 

 

 

 

 

 

 

0

0

011

01

256

Mb (16Mx16), 4 banks, row length=13, column length=9

 

 

 

 

 

 

 

 

 

 

 

 

0

0

100

00

512

Mb (64Mx8), 4 banks, row length=13, column length=11

 

 

 

 

 

 

 

 

 

 

 

 

0

0

100

01

512

Mb (32Mx16), 4 banks, row length=13, column length=10

 

 

 

 

 

 

 

16-bit external bus low-power SDRAM address mapping (bank, row, column)

 

 

 

 

 

 

 

 

 

 

 

 

0

1

000

00

16

Mb (2Mx8), 2 banks, row length=11, column length=9

 

 

 

 

 

 

 

 

 

 

 

 

0

1

000

01

16

Mb (1Mx16), 2 banks, row length=11, column length=8

 

 

 

 

 

 

 

 

 

 

 

 

0

1

001

00

64

Mb (8Mx8), 4 banks, row length 12, column length=9

 

 

 

 

 

 

 

 

 

 

 

 

0

1

001

01

64

Mb (4Mx16), 4 banks, row length=12, column length=8

 

 

 

 

 

 

 

 

 

 

 

 

0

1

010

00

128

Mb (16Mx8), 4 banks, row length=12, column length=10

 

 

 

 

 

 

 

 

 

 

 

 

0

1

010

01

128

Mb (8Mx16), 4 banks, row length=12, column length=9

 

 

 

 

 

 

 

 

 

 

 

 

0

1

011

00

256

Mb (32Mx8), 4 banks, row length=13, column length=10

 

 

 

 

 

 

 

 

 

 

 

 

0

1

011

01

256

Mb (16Mx16), 4 banks, row length=13, column length=9

 

 

 

 

 

 

 

 

 

 

 

 

0

1

100

00

512

Mb (64Mx8), 4 banks, row length=13, column length=11

 

 

 

 

 

 

 

 

 

 

 

 

0

1

100

01

512

Mb (32Mx16, 4 banks, row length=13, column length=10

 

 

 

 

 

 

 

32-bit extended bus high-performance address mapping (row, bank, column)

 

 

 

 

 

 

 

 

 

 

 

 

1

0

000

00

16

Mb (2Mx8), 2 banks, row length=11, column length=9

 

 

 

 

 

 

 

 

 

 

 

 

1

0

000

01

16

Mb (1Mx16), 2 banks, row length=11, column length=8

 

 

 

 

 

 

 

 

 

 

 

 

1

0

001

00

64

Mb (8Mx8), 4 banks, row length=12, column length=9

 

 

 

 

 

 

 

 

 

 

 

 

1

0

001

01

64

Mb (4Mx16), 4 banks, row length=12, column length=8

 

 

 

 

 

 

 

 

 

 

 

 

1

0

001

10

64

Mb (2Mx32), 4 banks, row length=11, column length=8

 

 

 

 

 

 

 

 

 

 

 

 

1

0

010

00

128

Mb (16Mx8), 4 banks, row length=12, column length=10

 

 

 

 

 

 

 

 

 

 

 

 

1

0

010

01

128

Mb (8Mx16), 4 banks, row length=12, column length=9

 

 

 

 

 

 

 

 

 

 

 

 

1

0

010

10

128

Mb (4Mx32), 4 banks, row length=12, column length=8

 

 

 

 

 

 

 

 

 

 

 

 

1

0

011

00

256

Mb (32Mx8), 4 banks, row length=13, column length=10

 

 

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Page 249
Image 249
Digi NS9215 manual Address mapping, For the Dynamic, Memory Configuration, Description