M E M O R Y C O N T RO L L E R

Dynamic Memory Exit Self-refresh register

Note: The Dynamic Memory Auto Refresh Period register is used for all four dynamic memory chip selects. The worst case value for all chip selects must be programmed.

Register

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Reserved

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Reserved

 

 

 

 

 

 

 

RFC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Register bit

assignment

Bits

Access

Mnemonic

Description

 

 

 

 

 

 

D31:05

N/A

Reserved

N/A (do not modify)

 

 

 

 

 

 

D04:00

R/W

RFC

Auto-refresh period and auto-refresh to active command

 

 

 

 

period

0x0–0x1E

n+1 clock cycles, where the delay is in clk_out cycles

0x1F

32 clock cycles (reset value on reset_n)

D y n a m i c M e m o r y E x i t S e l f - r e f r e s h r e g i s t e r

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Address: A070 0050

The Dynamic Memory Exit Self-refresh register allows you to program the exit self- refresh to active command time, tXSR. It is recommended that this register be modified during system initialization, or when there are no current or outstanding transactions. Wait until the memory controller is idle, then enter low-power or disabled mode. This value normally is found in SDRAM datasheets as tXSR.

Note: The Dynamic Memory Exit Self-refresh register is used for all four dynamic memory chip selects. The worst case value for all the chip selects must be programmed.

244Hardware Reference NS9215

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Image 244
Digi NS9215 manual Rfc, Auto-refresh period and auto-refresh to active command, Period

NS9215 specifications

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