Digi NS9215 M e r 6 9 C o n t r o l r e g i s t e r s, Addresses A090 01A8 / 01AC / 01B0 / 01B4

S Y S T E M C O N T RO L M O D U L E

Timer 6–9 Control registers

Bits	Access	Mnemonic	Reset	Description
D09:06	R/W	TCS	0x0	Timer clock select
				0000	AHB clock x 2
				0001	AHB clock
				0010	AHB clock / 2
				0011	AHB clock / 4
				0100	AHB clock / 8
				0101	AHB clock / 16
				0110	AHB clock / 32
				0111	AHB clock / 64
				1000	AHB clock / 128
				1111	External event
D05:04	R/W	Timer mode 1	0x0	Timer mode 1
				00 Internal timer or external event
				01 External low-level gated timer
				10 External high-level gated timer
				11 Concatenate the lower timer.
				Note:	When either external gated option is
					selected, the time clock select bits deter-
					mine the frequency.

D03	R/W	Int Sel	0x0	Interrupt select
				0	Interrupt disable
				1	Generate IRQ
D02	R/W	Up Down	0x0	Up/Down select
				0	Up counter
				1	Down counter
D01	R/W	Bit timer	0x0	32 or 16 bit timer
				0	16-bit timer
				1	32-bit timer
D00	R/W	Rel Enbl	0x0	Reload enable
				0	Halt at terminal count. The timer must be
					disabled, then enabled to reload the timer when
					the terminal count is reached.
				1	Reload and resume count at terminal count

T i m e r 6 – 9 C o n t r o l r e g i s t e r s

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Addresses: A090 01A8 / 01AC / 01B0 / 01B4

168Hardware Reference NS9215