Digi NS9215 manual Java instruction set, ARM926EJ-S system addresses Address manipulation example

Java instruction set

WO R K I N G W I T H T H E C P U	. .
System control processor (CP15) registers..
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In Java state, the processor core executes a majority of Java bytecodes naturally. Bytecodes are decoded in two states, compared to a single decode stage when in ARM/Thumb mode. See “Jazelle(Java)” on page 104 for more information about Java.

S y s t e m c o n t r o l p r o c e s s o r ( C P 1 5 ) r e g i s t e r s

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ARM926EJ-S system addresses

Address manipulation example

The system control processor (CP15) registers configure and control most of the options in the ARM926EJ-S processor. Access the CP15 registers using only the MRC and MCR instructions in a privileged mode; the instructions are provided in the explanation of each applicable register. Using other instructions, or MRC and MCR in unprivileged mode, results in an UNDEFINED instruction exception.

The ARM926EJ-S has three distinct types of addresses: In the ARM926EJ-S domain: Virtual address (VA)

In the Cache and MMU domain: Modified virtual address (MVA)

In the AMBA domain: Physical address (PA)

This is an example of the address manipulation that occurs when the ARM926EJ-S core requests an instruction:

1The ARM926EJ-S core issues the virtual address of the instruction.

2The virtual address is translated using the FCSE PID (fast context switch extension process ID) value to the modified virtual address. The instruction cache (ICache) and memory management unit (MMU) find the modified virtual address (see “R13:Process ID register” on page 102).

Accessing CP15 registers

3If the protection check carried out by the MMU on the modified virtual address does not abort and the modified virtual address tag is in the ICache, the instruction data is returned to the ARM926EJ-S core.

If the protection check carried out by the MMU on the modified virtual address does not abort but the cache misses (the MVA tag is not in the cache), the MMU translates the modified virtual address to produce the physical address. This address is given to the AMBA bus interface to perform an external access.

Use only MRC and MCR instructions, only in privileged mode, to access CP15 registers. Figure 1 shows the MRC and MCR instruction bit pattern.

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