Intel PCI-X, Intel Gigabit Ethernet Controllers manual Software Defined Pins Control Word 10h, 20h

EEPROM Interface

Table 5-8. Software Defined Pins Control (Word 10h, 20h)

Bit	Name	Description
		SDP7(3) Pin - Initial Direction.
	SDPDIR[7]	Set this bit to 0b (default) to configure the initial hardware value of
15		the SDP7(3)_IODIR bit in the Extended Device Control Register
	SDPDIR[3] for the 82541xx
		(CTRL_EXT) following power up.
	and 82547GI/EI	Set this bit to 1b if not connected on a board or if used as an
		output.
		SDP6(2) Pin - Initial Direction.
	SDPDIR[6]	Set this bit to 0b (default) to configure the initial hardware value of
14		the SDP6(2)_IODIR bit in the Extended Device Control Register
	SDPDIR[2] for the 82541xx
		(CTRL_EXT) following power up.
	and 82547GI/EI	Set this bit to 1b if not connected on a board or if used as an
		output.
13:10	Reserved	Set these bits to 0b.
		SDP1 Pin - Initial Direction.
		Set this bit to 0b (default) to configure the initial hardware value of
9	SDPDIR[1]	the SDP1_IODIR bit in the Extended Device Control Register
		(CTRL_EXT) following power up.
		Set this bit to 1b if not connected on a board or if used as an
		output.
		SDP0 Pin - Initial Direction.
		Set this bit to 0b (default) to configure the initial hardware value of
8	SDPDIR[0]	the SDP0_IODIR bit in the Extended Device Control Register
		(CTRL_EXT) following power up.
		Set this bit to 1b if not connected on a board or if used as an
		output.
		SDP7(3) Pin - Initial Output Value.
	SDPVAL[7]	Set this bit to 0b (default) to configure the initial power-on value
7		output on SDP7(3) (when configured as an output) by configuring
	SDPVAL[3] for the 82541xx
		the initial hardware value of the SDP7(3)_DATA bit in the Extended
	and 82547GI/EI	Device Control Register (CTRL_EXT) after power up.
		Set this bit to 1b if used as an output.
		SDP6(2) Pin - Initial Output Value.
	SDPVAL[6]	Set this bit to 0b (default) to configure the initial power-on value
6		output on SDP6(2) (when configured as an output) by configuring
	SDPVAL[2] for the 82541xx
		the initial hardware value of the SDP6(2)_DATA bit in the Extended
	and 82547GI/EI	Device Control Register (CTRL_EXT) after power up.
		Set this bit to 1b if used as an output.
5:4	Reserved	Set these bits to 0b.
		Set this bit to 1b (default) to configure the initial hardware default
		value of this bit in the Device Control Register (CTRL) following
		power up.
3	EN_PHY_PWR_MGMT	Set this bit to 0b to not configure the initial hardware default value
		of this bit in the Device Control Register (CTRL) following power
		up.

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