Intel Intel Gigabit Ethernet Controllers Power Management 129 Introduction to Power Management

Contents

6	Power Management			129
	6.1	Introduction to Power Management		129
	6.2	Assumptions		129
	6.3	D3cold support		130
		6.3.1	Power States	130
		6.3.2	Timing	132
		6.3.3	PCI Power Management Registers	137
	6.4	Wakeup	.............................................................................................................	141
		6.4.1	Advanced Power Management Wakeup	141
		6.4.2	ACPI Power Management Wakeup	142
		6.4.3	Wakeup Packets	143
8	Ethernet Interface			153
	8.1	Introduction		153
	8.2	Link Interfaces Overview		153
		8.2.1	Internal SerDes Interface/TBI Mode– 1Gb/s	154
		8.2.2	GMII – 1 Gb/s	155
		8.2.3	MII – 10/100 Mb/s	156
	8.3	Internal Interface		156
	8.4	Duplex Operation		156
		8.4.1	Full Duplex	157
		8.4.2	Half Duplex	157
	8.5	Auto-Negotiation and Link Setup		159
	8.6	Auto-Negotiation and Link Setup		159
		8.6.1	Link Configuration in Internal Serdes/TBI Mode	160
		8.6.2	Internal GMII/MII Mode	163
		8.6.3	Internal SerDes Mode Control Bit Resolution	166
		8.6.4	Internal PHY Mode Control Bit Resolution	167
		8.6.5	Loss of Signal/Link Status Indication	169
	8.7	10/100 Mb/s Specific Performance Enhancements		170
		8.7.1	Adaptive IFS	170
		8.7.2	Flow Control	171
		8.7.3	MAC Control Frames & Reception of Flow Control Packets	171
		8.7.4	Discard PAUSE Frames and Pass MAC Control Frames	173
		8.7.5	Transmission of PAUSE Frames	173
		8.7.6	Software Initiated PAUSE Frame Transmission	174
		8.7.7	External Control of Flow Control Operation	174
9	802.1q VLAN Support			175
	9.1	802.1q VLAN Packet Format		175
		9.1.1	802.1q Tagged Frames	175
	9.2	Transmitting and Receiving 802.1q Packets		176
		9.2.1	Adding 802.1q Tags on Transmits	176
		9.2.2	Stripping 802.1q Tags on Receives	176
	9.3	802.1q VLAN Packet Filtering		176
10	Configurable LED Outputs			179
	10.1	Configurable LED Outputs		179
		10.1.1	Selecting an LED Output Source	179
		10.1.2	Polarity Inversion	180
viii			Software Developer’s Manual