Register Descriptions

Field

Bit(s)

Initial

Description

Value

 

 

 

 

 

 

 

 

 

 

Packet Checksum Start

 

 

 

Controls the starting byte for the Packet Checksum

 

 

 

calculation. The Packet Checksum is the one’s complement

 

 

 

over the receive packet, starting from the byte indicated by

 

 

 

RXCSUM.PCSS (0b corresponds to the first byte of the

 

 

 

packet), after stripping. For example, for an Ethernet II frame

 

 

 

encapsulated as an 802.3ac VLAN1 packet and with

PCSS

7:0

0b

RXCSUM.PCSS set to 14, the packet checksum would

include the entire encapsulated frame, excluding the 14-byte

 

 

 

 

 

 

Ethernet header (DA,SA,Type/Length) and the 4-byte VLAN

 

 

 

tag. The Packet Checksum does not include the Ethernet

 

 

 

CRC if the RCTL.SECRC bit is set. Software must make the

 

 

 

required offsetting computation (to back out the bytes that

 

 

 

should not have been included and to include the pseudo-

 

 

 

header) prior to comparing the Packet Checksum against the

 

 

 

TCP checksum stored in the packet.

 

 

 

 

 

 

 

IP Checksum Off-load Enable

 

 

 

RXCSUM.IPOFLD is used to enable the IP Checksum

 

 

 

offloading feature. If RXCSUM.IPOFLD is set to 1b, the

 

 

 

Ethernet controller calculates the IP checksum and indicates

IPOFLD

8

0b

a pass/fail indication to software through the Checksum Error

bit (CSE) in the ERROR field to the receive descriptor. If both

 

 

 

RXCSUM.IPOFLD and RXCSUM.TUOFLD are set, the

 

 

 

Checksum Error bit (CSE) is set if either checksum was

 

 

 

incorrect. If neither RSCSUM.IPOFLD nor

 

 

 

RXCSUM.TUOFLD is set, the Checksum Error bit (CSE) is

 

 

 

be 0b for all packets.

 

 

 

 

 

 

 

TCP/UDP Checksum Off-load Enable

 

 

 

RXCSUM.TUOFL is used to enable the TCP/UDP Checksum

 

 

 

off-loading feature. When set to 1b, the Ethernet controller

 

 

 

calculates the TCP or UDP checksum and indicate a pass/fail

TUOFLD

9

0b

indication to software through the Checksum Error bit (CSE).

If both RXCSUM.TUOFLD and RXCSUM.TUOFLD are set,

 

 

 

 

 

 

the Checksum Error bit (CSE) is set if either checksum was

 

 

 

incorrect. If neither RXCSUM.IPOFLD nor

 

 

 

RXCSUM.TUOFLD is set, the Checksum Error bit (CSE) is

 

 

 

0b for all packets.

 

 

 

 

 

 

 

IPv6 Checksum Offload Enable

IPV6OFL2

10

0b

If IPV6OFL is set to 1b, hardware parses IPv6 headers when

 

 

 

parsing a receive packet. This applies to checksum offloading

 

 

 

only.

 

 

 

 

Reserved

31:11

0b

Reserved

Reads as 0b. Should be written with 0b for future

 

 

 

compatibility.

 

 

 

 

1.Not applicable to the 82541ER.

2.Not applicable to the 82544GC/EI.

322

Software Developer’s Manual

Page 336
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Intel PCI-X, Intel Gigabit Ethernet Controllers manual Ipofld, Tuofld, IPV6OFL