Intel PCI manual Excessive Collisions Count, Multiple Collision Count, Ecol 04018h R, MCC 0401Ch R

Register Descriptions

Table 13-98. SCC Register Bit Description

31			0
			SCC
Field	Bit(s)	Initial	Description
		Value
SCC	31:0	0b	Number of times a transmit encountered a single collision.

13.7.7Excessive Collisions Count

ECOL (04018h; R)

When 16 or more collisions have occurred on a packet, this register increments, regardless of the value of collision threshold. If collision threshold is set below 16, this counter won’t increment. This register only increments if transmits are enabled and the Ethernet controller is in half-duplex mode.

Table 13-99. ECOL Register Bit Description

31			0
			ECC
Field	Bit(s)	Initial	Description
		Value
ECC	31:0	0b	Number of packets with more than 16 collisions.

13.7.8Multiple Collision Count

MCC (0401Ch; R)

This register counts the number of times that a transmit encountered more than one collision but less than 16. This register only increments if transmits are enabled and the Ethernet controller is in half-duplex mode.

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