Intel PCI-X manual Flow Control Type, Vlan Ether Type, FCT 00030h R/W, VET 00038h R/W

Register Descriptions

Table 13-54. FCAH Register Bit Description

31 16 15 0

Reserved

FCAH

Field	Bit(s)	Initial	Description
		Value
FCAH	15:0	X	Flow Control Address High
			Should be programmed with 0100h.
			Reserved
Reserved	31:16	0b	Should be written with 0b to ensure future compatibility.
			Reads as 0b.

13.4.10Flow Control Type

FCT (00030h; R/W)

This register contains the type field that hardware matches to recognize a flow control packet and that hardware uses when transmitting a PAUSE packet to its remote node. Only the lower 16 bits of this register have meaning. This register should be programmed with 88_08h. The upper byte is first on the wire FCT[15:8].

Table 13-55. FCT Register Bit Description

31 16 15 0

Reserved

FCT

Field	Bit(s)	Initial	Description
		Value
FCT	15:0	X	Flow Control Type
			Should be programmed with 88_08h.
			Reserved
Reserved	31:16	0b	Should be written with 0b to ensure future compatibility.
			Reads as 0b.

13.4.11VLAN Ether Type

VET (00038h; R/W)

This register contains the type field hardware matches against to recognize an 802.1Q (VLAN) Ethernet packet and uses when add and transmit VLAN Ethernet packets. To be compliant with the 802.3ac standard, this register should be programmed with the value 8100h. For VLAN transmission the upper byte is first on the wire (VET[15:8]).

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