Intel PCI-X manual Receive Undersize Count, Receive Fragment Count, RUC 040A4h R, RFC 040A8h R

Register Descriptions

This register does not increment when flow control packets are received.

Table 13-125. RNBC Register Bit Description

31			0
			RNBC
Field	Bit(s)	Initial	Description
		Value
RNBC	31:0	0b	Number of receive no buffer conditions.

13.7.34Receive Undersize Count

RUC (040A4h; R)

This register counts the number of received frames that passed address filtering, and were less than minimum size (64 bytes from <Destination Address> through <CRC>, inclusively), and had a valid CRC. This register only increments if receives are enabled.

Table 13-126. RUC Register Bit Description

31			0
			RUC
Field	Bit(s)	Initial	Description
		Value
RUC	31:0	0b	Number of receive undersize errors.

13.7.35Receive Fragment Count

RFC (040A8h; R)

This register counts the number of received frames that passed address filtering, and were less than minimum size (64 bytes from <Destination Address> through <CRC>, inclusively), but had a bad CRC (this is slightly different from the Receive Undersize Count register). This register only increments if receives are enabled.

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