Register Descriptions

Table 13-61. Mode Encodings for LED Outputs1

 

 

 

 

 

 

Mode

Pneumonic

State / Event Indicated

 

 

 

 

 

 

 

0000b

LINK_10/1000

Asserted when either 10 or 1000 Mbps link is

 

 

established and maintained.

 

 

 

 

 

 

 

 

 

 

 

0001b

LINK_100/1000

Asserted when either 100 or 1000 Mbps link is

 

 

established and maintained.

 

 

 

 

 

 

 

 

 

 

 

0010b

LINK_UP

Asserted when any speed link is established and

 

 

maintained.

 

 

 

 

 

 

 

 

 

 

 

 

 

Asserted when link is established and packets are

 

 

0011b

ACTIVITY

being transmitted or receive activity that passes

 

 

 

 

filtering.

 

 

 

 

 

 

 

0100b

LINK/ACTIVITY

Asserted when link is established and when there is

 

 

no transmit or receive activity that passes filtering.

 

 

 

 

 

 

 

 

 

 

 

0101b

LINK_10

Asserted when a 10 Mbps link is established and

 

 

maintained.

 

 

 

 

 

 

 

 

 

 

 

0110b

LINK_100

Asserted when a 100 Mbps link is established and

 

 

maintained.

 

 

 

 

 

 

 

 

 

 

 

0111b

LINK_1000

Asserted when a 1000 Mbps link is established and

 

 

maintained.

 

 

 

 

 

 

 

 

 

 

 

1000b

PCIX_MODE

Asserted when Ethernet controller is in PCI-X mode

 

 

(deasserted in PCI mode).

 

 

 

 

 

 

 

 

 

 

 

1001b

FULL_DUPLEX

Asserted when the link is configured for full duplex

 

 

operation (deasserted in half-duplex).

 

 

 

 

 

 

 

 

 

 

 

1010b

COLLISION

Asserted when a collision is observed.

 

 

 

 

 

 

 

 

 

Asserted when the Ethernet controller is operating

 

 

 

 

in a PCI 66 MHz or a PCI-X 133 MHz configuration

 

 

1011b

BUS_SPEED

(high-speed PCI operation), deasserted for 33 MHz

 

 

 

 

PCI and 66 MHz PCI-X (as determined by pins

 

 

 

 

sampled at PCI reset).

 

 

 

 

 

 

 

 

BUS_SIZE

Asserted when the Ethernet controller is operating

 

 

1100b

Reserved for the

as a 64-bit PCI or PCI-X device, deasserted for 32-

 

 

 

82547GI/EI only)

bit configuration.

 

 

 

 

 

 

 

1101b

PAUSED

Asserted when the Ethernet controller’s transmitter

 

 

is flow controlled.

 

 

 

 

 

 

 

 

 

 

 

 

 

Always high. Assuming no optional inversion

 

 

1110b

VCC/LED_ON

selected, causes output pin high / LED ON for

 

 

 

 

typical LED circuit.

 

 

 

 

 

 

1.Not applicable to the 82544GC/EI.

Software Developer’s Manual

287

Page 301
Image 301
Intel PCI-X, Intel Gigabit Ethernet Controllers Mode Encodings for LED Outputs, Mode Pneumonic State / Event Indicated