Intel PCI Internal SerDes Mode1 Control Bit Resolution, Internal Serdes Mode1 Hardware Enabled

Ethernet Interface

8.6.3Internal SerDes Mode1 Control Bit Resolution

Tables 8-3, 8-4, and 8-52list how on-chip Auto-Negotiation affects control bits in the Ethernet controller. Table 8-5lists the case where software Auto-Negotiation is not performed and link is forced.

Table 8-3. Internal Serdes Mode1 – Hardware Enabled

TXCW.ANE = 1b

Control Bit	Effect on Control Bits
CTRL.FD	Ignored; duplex is set by priority resolution of TXCW and RXCW
CTRL.SLU	Ignored; it is not possible to force link configuration (ANE takes precedence)
CTRL.RFCE	Set by priority resolution (read only)
CTRL.TFCE	Set by priority resolution (read only)
CTRL.SPEED	No impact; speed always 1000 Mb/s in Internal Serdesa mode
STATUS.FD	Set by priority resolution
STATUS.LU	Duplicate of RXCW.ANC (Auto-Negotiation complete)
STATUS.SPEED	Internal SerDesa Mode is always 1000 Mb/s; fixed at 10b

a.TBI for the 82544GC/EI.

Table 8-4. Internal Serdes1 Mode – Software Enabled

TXCW.ANE = 0b

Control Bit	Effect on Control Bits
CTRL.FD	Duplex is set by software priority resolution
CTRL.SLU	Set by software when Auto-Negotiation is complete.
CTRL.RFCE	Set by software as a result of software priority resolution
CTRL.TFCE	Set by software as a result of software priority resolution
CTRL.SPEED	No impact; speed always 1000 Mb/s in Internal SerDesa mode
STATUS.FD	Reflects the value of CTRL.FD
STATUS.LU	Reflects CTRL.SLU and internal link indication
STATUS.SPEED	Internal Serdesa Mode is always 1000 Mb/s; fixed at 10b

a.TBI for the 82544GC/EI.

1.TBI Mode for the 82544GC/EI.

2.Not applicable to the 82541xx, 82547GI/EI, or 82540EP/EM.

166 Software Developer’s Manual