Intel PCI-X, Intel Gigabit Ethernet Controllers manual 10.1.3

				Contents
		10.1.3	Blink Control	180
11	PHY Functionality and Features			183
	11.1	Auto-Negotiation		183
		11.1.1	Overview	183
		11.1.2	Next Page Exchanges	184
		11.1.3	Register Update	184
		11.1.4	Status	185
	11.2 MDI/MDI-X Crossover (copper only)			185
		11.2.1	Polarity Correction (copper only)	186
		11.2.2	10/100 Downshift (82540EP/EM Only)	186
	11.3	Cable Length Detection (copper only)		187
	11.4	PHY Power Management (copper only)		187
		11.4.1	Link Down – Energy Detect (copper only)	187
		11.4.2	D3 State, No Link Required (copper only)	188
		11.4.3	D3 Link-Up,Speed-Management Enabled (copper only)	188
		11.4.4	D3 Link-Up,Speed-Management Disabled (copper only)	188
	11.5	Initialization		189
		11.5.1	MDIO Control Mode	189
	11.6	Determining Link State		190
		11.6.1	False Link	191
		11.6.2	Forced Operation	191
		11.6.3	Auto Negotiation	192
		11.6.4	Parallel Detection	192
	11.7	Link Criteria		192
		11.7.1	1000BASE-T	192
		11.7.2	100BASE-TX	192
		11.7.3	10BASE-T	193
	11.8	Link Enhancements		193
		11.8.1	SmartSpeed	193
		11.8.2	Flow Control	193
	11.9	Management Data Interface		194
	11.10	Low Power Operation		194
		11.10.1	Powerdown via the PHY Register	195
		11.10.2	Smart Power-Down	195
	11.11	1000 Mbps Operation		195
		11.11.1	Introduction	195
		11.11.2	Transmit Functions	197
		11.11.3	Transmit FIFO	197
		11.11.4	Receive Functions	199
	11.12	100 Mbps Operation		200
	11.13	10 Mbps Operation		200
		11.13.1	Link Test	201
		11.13.2 10Base-T Link Failure Criteria and Override		201
		11.13.3	Jabber	201
		11.13.4	Polarity Correction	201
		11.13.5	Dribble Bits	201
	11.14 PHY Line Length Indication			201

Software Developer’s Manual ix