Intel Intel Gigabit Ethernet Controllers, PCI-X manual Packet Buffer Allocation, PBA 01000H R/W

Register Descriptions

Mode	Pneumonic	State / Event Indicated
		Always low. Assuming no optional inversion
1111b	GND/LED_OFF	selected, causes output pin low / LED OFF for
		typical LED circuit.

13.4.16Packet Buffer Allocation

PBA (01000H; R/W)

This register sets the on-chip receive and transmit storage allocation ratio. The receive allocation value is read/write for the lower seven bits. The receive allocation value must be a multiple of eight (multiple of two for the 82547GI/EI B1 stepping). The transmit allocation is read-only and is calculated based on PBA.RXA.

Table 13-62. PBA Register Bit Description

31 16 15 0

TXA

RXA

Field	Bit(s)	Initial Value	Description
			Receive Packet Buffer Allocation in KB
		0030h1	Sets the size of the receive packet buffer.
	6:0		The value of this field must be a multiple of eight.
			The upper nine bits are read only as 0b. Default is
RXA		0016h (82547EI A0-B0	48 KB.
	15:0 (82541xx	steppings)
	and 82547GI/EI)	001Eh (82547GI B1	For the 82541xx and 82547GI/EI, the upper unused
		stepping)	bits are read only as 0b. The default is 48 KB for the
			82541xx, 24 KB for the 82547EI, and 20 KB for the
			82547GI.
			Receive Packet Buffer Allocation – Upper Bits
RXA_R2	15:7	0b	Provides the upper nine bits of the receive packet
			buffer allocation.
			Read only bits - Read as 0b.
		0010h	Transmit Packet Buffer Allocation
	31:16		Provides the size of the transmit packet buffer. The
			value is in units of KB. These bits are read only.
TXA		0012h (82547EI A0-B0	TXA is calculated based on RXA value: TXA = 64 –
	15:00 (82541xx	steppings)	RXA.
	and 82547GI/EI)	000Ah (82547GI B1	For the 82547GI/EI, TXA is calculated based on
		stepping)
			RXA value: TXA = 40 – RXA.

1.Not applicable to the 82547GI/EI.

2.Not applicable to the 82541xx or 82547GI/EI.

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