Intel Intel Gigabit Ethernet Controllers, PCI Receive Descriptor Length, Receive Descriptor Head

Register Descriptions

13.4.27Receive Descriptor Length

RDLEN (02808h; R/W)

This register determines the number of bytes allocated to the circular receive descriptor buffer. This value must be 128-byte aligned (the maximum cache line size). Since each descriptor is 16 bytes in length, the total number of receive descriptors is always a multiple of eight.

Table 13-72. RDLEN Register Bit Description

31 20 19 7 6 0

Reserved

LEN

0

Field	Bit(s)	Initial	Description
		Value
Zero	6:0	0b	Zero value
			Ignore on write. Reads back as 0b.
LEN	19:7	0b	Receive Descriptor length
			Provides the number of receive descriptors (in a multiple of eight).
			Reserved
Reserved	31:20	0b	Should be written with 0b to ensure future compatibility.
			Reads as 0b.

13.4.28Receive Descriptor Head

RDH (02810h; R/W)

This register contains the head pointer for the receive descriptor buffer. The register points to a 16- byte datum. Hardware controls the pointer. The only time that software should write to this register is after a reset (RCTL.RST or CTRL.RST) and before enabling the receiver function (RCTL.EN). If software were to write to this register while the receive function was enabled, the on-chip descriptor buffers can be invalidated and other indeterminate operations might result. Reading the descriptor head to determine which buffers are finished is not reliable.

Table 13-73. RDH Register Bit Description

31 16 15 0

Reserved

RDH

Field	Bit(s)	Initial	Description
		Value
RDH	15:0	0b	Receive Descriptor Head.
Reserved	31:16	0b	Reserved. Should be written with 0b for future compatibility.
			Reads as 0b.

Software Developer’s Manual 303