Architectural Overview

2.2External Architecture

Figure 2-1shows the external interfaces to the 82546GB/EB.

 

 

MDI

 

MDI

 

 

 

Interface A

 

Interface B

 

 

 

1000Base-T PHY Interfaces

 

Design for

 

10/100/1000

10/100/1000

 

Test Interface

 

 

 

PHY

 

PHY

SMBus

 

 

 

External

 

 

 

 

Interface

 

GMII/

 

GMII/

 

TBI Interface

MDIO

MDIO

EEPROM

MII

MII

 

 

 

 

 

Interface

 

Device

Device

Flash Interface

 

Function 0

Function 1

 

LEDs

MAC/Controller

MAC/Controller

LEDs

(LAN A)

(LAN B)

Software

 

 

 

 

Software

Defined Pins

 

 

 

 

Defined Pins

 

 

PCI (64-bit, 33/66 MHz)/PCI-X (133 MHz)

 

Figure 2-1. 82546GB/EB External Interface

 

Figure 2-2shows the external interfaces to the 82545GM/EM, 82544GC/EI, 82540EP/EM, and

82541xx.

 

 

 

 

 

MDI

 

 

 

Interface

 

 

 

1000Base-T PHY Interface

 

Design for

 

10/100/1000

 

Test Interface

 

 

 

PHY

SMBus

 

 

External

 

 

Interface

 

GMII/

 

TBI Interface

MDIO

EEPROM

MII

(82545GM/EM only)

 

 

Interface

 

Device

Flash Interface

 

 

 

Function 0

 

LEDs

MAC/Controller

 

Software

 

 

 

Defined Pins

 

 

 

 

PCI (64-bit, 33/66 MHz)/PCI-X (133 MHz)

 

Note: 82540EP/EM and 82541xx do not support PCI-X; 82544GC/EI and 82541ER do not support SMBus interface

Figure 2-2. 82545GM/EM, 82544GC/EI, 82540EP/EM, and 82541xx External Interface

8

Software Developer’s Manual

Page 22
Image 22
Intel PCI-X, Intel Gigabit Ethernet Controllers manual External Architecture, Phy, LAN a LAN B