Intel PCI-X manual Tctl Register Bit Description, Psp, Tctl.Cold, Swxoff

Register Descriptions

Table 13-76. TCTL Register Bit Description

31 26 25 22 21 12 11 4 3 0

Reserved

CNTL Bits

COLD

CT

CNTL Bits

Field	Bit(s)	Initial	Description
		Value
Reserved	0	0b	Reserved
			Write as 0b for future compatibility.
			Transmit Enable
			The transmitter is enabled when this bit is set to 1b. Writing 0b to
EN	1	0b	this bit stops transmission after any in progress packets are sent.
			Data remains in the transmit FIFO until the device is re-enabled.
			Software should combine this operation with reset if the packets in
			the TX FIFO should be flushed.
			Reserved
Reserved	2	0b	Reads as 0b.
			Should be written to 0b for future compatibility.
			Pad Short Packets
			0b = Do not pad.
			1b = Pad short packets.
			Padding makes the packet 64 bytes long. The padding content is
PSP	3	0b	data.
			When the Pad Short Packet feature is disabled, the minimum
			packet size the Ethernet controller can transfer to the host is 32
			bytes long.
			This feature is not the same as Minimum Collision Distance
			(TCTL.COLD).
			Collision Threshold
			This determines the number of attempts at re-transmission prior to
CT	11:4	0b	giving up on the packet. The Ethernet back–off algorithm is
			implemented and clamps to the maximum value after 16 retries. It
			only has meaning in half-duplex operation. Recommended value –
			0Fh.
			Collision Distance
			Specifies the minimum number of byte times that must elapse for
			proper CSMA/CD operation. Packets are padded with special
			symbols, not valid data bytes. Hardware checks this value and
			padded packets even in full-duplex operation.
COLD	21:12	0b	Recommended value:
			Half-Duplex – 512-byte time (200h)
			Full-Duplex – 64-byte time (40h)
			Note: 10/100 half-duplex - 64 - 68 (40h to 44h) byte times for the
			82541xx and 82547GI/EI only.
			Software XOFF Transmission
			When set to 1b, the Ethernet controller schedules the transmission
SWXOFF	22	0b	of an XOFF (PAUSE) frame using the current value of the PAUSE
			timer (FCTTV.TTV). This bit self-clears upon transmission of the
			XOFF frame. This bit is valid only in Full-Duplex mode of
			operation. Software should not set this bit while the Ethernet
			controller is configured for half-duplex operation.

Software Developer’s Manual 307