Intel PCI-X manual Transmit Data Fifo Tail Saved Register, Transmit Data Fifo Packet Count

Register Descriptions

Table 13-149. TDFHS Register Bit Description

31 13 12 0

Reserved

FIFO Head

Field	Bit(s)	Initial	Description
		Value
FIFO Head	12:0	0b	A “saved” value of the Transmit FIFO Head pointer.
Reserved	31:13	0b	Reads as 0b. Should be written to 0b for future compatibility.

13.8.9Transmit Data FIFO Tail Saved Register

TDFTS (03428h; R/W)

This register stores a copy of the Transmit Data FIFO Tail register in case the internal register needs to be restored. This register is available for diagnostic purposes only, and should not be written during normal operation.

Table 13-150. TDFTS Register Bit Description

31 13 12 0

Reserved

FIFO Tail

Field	Bit(s)	Initial	Description
		Value
FIFO Tail	12:0	0b	A “saved” value of the Transmit FIFO Tail pointer.
Reserved	31:13	0b	Reads as 0b. Should be written to 0b for future compatibility.

13.8.10Transmit Data FIFO Packet Count

TDFPC (03430h; R/W)

This register reflects the number of packets to be transmitted that are currently in the Transmit FIFO. This register is available for diagnostic purposes only, and should not be written during normal operation.

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