Register Descriptions

Table 13-35. PHY Interrupt Enable Bit Description

Field

Bit(s)

 

Description

Mode

HW Rst

SW Rst

 

 

 

 

 

 

 

Page Received

12

1b

= Interrupt enable.

R/W

0b

Retain

Interrupt Enable

0b

= Interrupt disable.

 

 

 

 

 

 

 

 

 

 

 

Duplex Changed

13

1b

= Interrupt enable.

R/W

0b

Retain

Interrupt Enable

0b

= Interrupt disable.

 

 

 

 

 

 

 

 

 

 

 

Speed Changed

14

1b

= Interrupt enable.

R/W

0b

Retain

Interrupt Enable

0b

= Interrupt disable.

 

 

 

 

 

 

 

 

 

 

 

Auto-Negotiation

 

1b

= Interrupt enable.

 

 

 

Error

15

R/W

0b

Retain

0b

= Interrupt disable.

Interrupt Enable

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PHY Port Control Register (82541xx and 82547GI/EI Only)

PPCONT (18d; R/W)

Table 13-36. PHY Port Control Register Bit Description

Field

Bit(s)

Description

Mode

HW Rst

SW Rst

 

 

 

 

 

 

Reserved

3:0

Always read as 0b. Write to 0b for

R/W

0b

0b

normal operation.

 

 

 

 

 

 

 

 

 

 

 

TP Loopback

4

Allow gigabit loopback on twisted pairs.

R/W

0b

0b

 

 

 

 

 

 

 

 

82541EI/82547GI (B0 stepping):

 

 

 

 

 

Reserved, write to 0b.

 

 

 

Fast Downshift

 

82541/GI/ER and 82547GI (B1

 

 

 

5

stepping): Fast 1000 Mb to 100 Mb

R/W

0b

0b

Enable

 

downshift enable.

 

 

 

 

 

 

 

 

 

 

0b = Downshift after 16 seconds.

 

 

 

 

 

1b = Downshift after 10 seconds.

 

 

 

 

 

 

 

 

 

Reserved

8:6

Always read as 0b. Write to 0b for

R/W

0b

0b

normal operation.

 

 

 

 

 

 

 

 

 

 

 

Non-Compliant

 

1b = Detect and correct for non-

 

 

 

 

compliant scrambler.

 

 

0b1

Scrambler

9

R/W

0b

0b = Detect and report non-compliant

Compensation

 

 

 

 

 

scrambler.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1b = Extend CRS to cover GMII latency

 

 

 

TEN_CRS_Select

10

and RX_DV.

R/W

1b

1b

0b = Do not extend CRS (RX_DV can

 

 

 

 

 

 

 

continue past CRS).

 

 

 

 

 

 

 

 

 

Reserved

11

Always write as 1b for normal operation.

R/W

1b

1b

 

 

 

 

 

 

 

 

Auto-MDI-X algorithm enable.

 

 

 

 

 

1b = Enable Auto-MDI-X mode.

 

 

 

 

 

0b = Disable Auto-MDI-X mode (manual

 

 

 

Auto-MDI-X

12

mode).

R/W

1b

1b

Note: When forcing speed to 10Base-T

 

 

 

 

 

 

 

or 100Base-T, use manual mode. Clear

 

 

 

 

 

the bit and set PHY register 18, bit 13

 

 

 

 

 

according to the required MDI-X mode.

 

 

 

 

 

 

 

 

 

Software Developer’s Manual

267

Page 281
Image 281
Intel Intel Gigabit Ethernet Controllers, PCI-X manual 82541EI/82547GI B0 stepping, 82541/GI/ER and 82547GI B1