Ethernet Interface

The final check for a valid PAUSE frame is the MAC Control Opcode. At this time only the PAUSE control frame opcode is defined. It has a value of 0001h.

Frame based flow control differentiates XOFF from XON based on the value of the PAUSE timer field. Non-zero values constitute XOFF frames while a value of zero constitutes an XON frame. Values in the timer field are in units of slot time. A “slot time” is hard wired to 64 byte times, or 512 ns.

Note: “S” is the Start-of-Packet delimiter and “T” is the first part of the End-of-

Packet delimiters for 802.3z encapsulation.

Figure 8-4. 802.3x MAC Control Frame Format

The receiver is enabled to receive flow control frames if flow control is enabled through the RFCE bit in the Device Control register (CTRL). Software sets this bit consistently with the advertised capability in the Transmit Configuration Word Register (TXCW).

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Software Developer’s Manual

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Intel PCI-X, Intel Gigabit Ethernet Controllers manual 3x MAC Control Frame Format