Intel PCI-X manual Receive Data Fifo Head Saved Register, Receive Data Fifo Tail Saved Register

Register Descriptions

Table 13-143. RDFT Register Bit Description

31 13 12 0

Reserved

FIFO Tail

Field	Bit(s)	Initial	Description
		Value
FIFO Tail	12:0	0b	Receive FIFO Tail pointer.
Reserved	31:13	0b	Reads as 0b. Should be written to 0b for future compatibility.

13.8.3Receive Data FIFO Head Saved Register

RDFHS (02420h; R/W)

This register stores a copy of the Receive Data FIFO Head register in case the internal register needs to be restored. This register is available for diagnostic purposes only, and should not be written during normal operation.

Table 13-144. RDFHS Register Bit Description

31 13 12 0

Reserved

FIFO Head

Field	Bit(s)	Initial	Description
		Value
FIFO Head	12:0	0b	A “saved” value of the Receive FIFO Head pointer.
Reserved	31:13	0b	Reads as 0b. Should be written to 0b for future compatibility.

13.8.4Receive Data FIFO Tail Saved Register

RDFTS (02428h; R/W)

This register stores a copy of the Receive Data FIFO Tail register in case the internal register needs to be restored. This register is available for diagnostic purposes only, and should not be written during normal operation.

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