Intel Intel Gigabit Ethernet Controllers Power Management Capabilities PMC 2 Bytes Offset = 2 RO

Power Management

6.3.3.3Power Management Capabilities - (PMC) 2 Bytes Offset = 2 (RO)

Bits	Default	R/W		Description
			PME_Support – This 5-bit field indicates the power states in which the
			function may assert PME#a. A value of 0b for any bit indicates that the
			function is not capable of asserting the PME# signal while in that power
			state.
			bit (11) (XXXX1)b – PME# can be asserted from D0
			bit (12) (XXX1X)b – PME# can be asserted from D1
			bit (13) (XX1XX)b – PME# can be asserted from D2
		Read	bit (14) (X1XXX)b – PME# can be asserted from D3hot
15:11	See text		bit (15) (1XXXX)b – PME# can be asserted from D3cold
		Only
			If Power Management is not disabled in the EEPROM, the Ethernet
			controller supports PME# generation from D0 and D3hot states. If Power
			Management is not disabled and AUX_POWER = 1b, the Ethernet
			controller also supports the D3cold state.
			Condition	Value
			00000b	Power Management disabled in EEPROM
			AUX_POWER = 01001b Power Management enabled,
			AUX_POWER = 11001b Power Management enabled,
			D2_Support - If this bit is set to 1b, supports the D2 Power Management
10	0b	Read	State.
			The Ethernet controller returns a value of 0b for this bit indicating that it
		Only
			does not support D2 and cannot handle the PCI clock stopping in PCI
			66 MHz mode (or PCI-Xbmode) without RST# being asserted.
		Read	D1_Support - If this bit is set to 1b, supports the D1 Power Management
09	0b		State. The Ethernet controller returns a value of 0b for this bit indicating
		Only
			that it does not support D1.
08:06	000b	Read	AUX Current – Specifies the auxiliary power current required for PME#
		Only	generation from D3cold if the Data Register is not implemented.
			DSI – The Device Specific Initialization bit indicates whether special
			initialization of this function is required (beyond the standard PCI
05	1b	Read	configuration header) before the generic class device driver is able to use
		Only	it. The Ethernet controller returns a value of 1b for this bit indicating that
			it’s device driver must be executed following transition to the D0
			uninitialized state.
04	0b	Read	Reserved
		Only
	Loaded	Read	PME_Clock - When this bit is a 1b it indicates that the function relies on
03	from		the presence of the PCI clock for PME# operation. The controller loads
		Only
	EEPROM		this bit from the EEPROM. Otherwise, it returns a 0b.
02:00	010b	Read	Version - A value of 010b indicates that this function complies with the
		Only	Revision 1.1 of the PCI Power Management Interface Specification.

a.Not applicable to the 82541ER.

b.Not applicable to the 82541xx, 82547GI/EI, or 82540EP/EM.

138 Software Developer’s Manual