Epson S1D13504 manual Display Buffer, 512K byte Memory AB200

Page 114	Epson Research and Development
	Vancouver Design Center

9 Display Buffer

The system addresses the display buffer through the CS#, M/R#, and AB[20:0] input pins. When CS# = 0 and M/R# = 1, the display buffer is addressed by bits AB[20:0] as shown in the following table.

		Table 9-1: S1D13504 Addressing
CS#	M/R#		Access
			Register access:
0	0		• REG[00h] is addressed when AB[5:0] = 0
			• REG[01h] is addressed when AB[5:0] = 1
			• REG[n] is addressed when AB[5:0] = n
0	1		Memory access: the 2M byte display buffer is addressed by
			AB[20:0]
1	X		S1D13504 not selected

The display buffer address space is always 2M bytes. However, the physical display buffer may be either 512K bytes or 2M bytes. See Section 5.5, “Summary of Configuration Options” on page 31.

The 512K byte display buffer is replicated in the 2M byte address space as shown below.

512K byte Memory	AB[20:0]	2M byte Memory
	000000h
Image Buffer
	07FFFFh
Half-Frame Buffer
	080000h
Image Buffer
Half-Frame Buffer	0FFFFFh	Image Buffer
	100000h
Image Buffer
Half-Frame Buffer	17FFFFh
	180000h
Image Buffer
Half-Frame Buffer	1FFFFFh	Half-Frame Buffer

Figure 9-1: Display Buffer Addressing

The display buffer will contain an image buffer and may also contain a half-frame buffer.

S1D13504	Hardware Functional Specification
X19A-A-002-18	Issue Date: 01/01/30