Epson Research and Development Page 29
Vancouver Design Center
Programming Notes and Examples S1D13504
Issue Date: 01/02/01 X19A-G-002-07
These three registers form the twenty bit offset to the first word in display buffer that will be shown
in the screen 2 portion of the display.
Screen 1 memory is always the first memory displayed at the top of the screen followed by screen
2 memory. However, the start address for the screen 2 image may in fact be lower in memory than
that of screen 1 (i.e. screen 2 could be coming from offset 0 in the display buffer while screen 1 was
coming from an offset located several thousand bytes into display buffer). While not particularly
useful, it is possible to set screen 1 and screen 2 to the same address.
4.3.2 Examples
Example 7: Display 380 scanlines of image 1 and 100 scanlines of image 2. Image 2 is locat-
ed immediately after image 1 in the display buffer. Assume a 640x480 display
and a color depth of 1 bpp.
1. The value for the line compare is not dependent on any other setting so we can set it immedi-
ately (380 = 0x17C).
Write the line compare registers [0Fh] with 0x01 and register [0Eh] with 0x7C.
2. Screen 1 is coming from offset 0 in the display buffer. Although not necessary, ensure that the
screen 1 start address is set to zero.
Write 0x00 to registers [10h], [11h] and [12h].
3. Calculate the size of the screen 1 image (so we know where the screen 2 image is located).
This calculation must be performed on the virtual size (offset register). Since a virtual size was
not specified assume the virtual size to be the same as the physical size.
offset = pixels_per_line / pixels_per_word = 640 / 16 = 40 words per line
screen1_size = offset * lines = 40 * 480 = 19,200 words = 0x4B00 words
4. Set the screen 2 start address to the value we just calculated.
Write the screen 2 start address registers [13h], [14h] and [15h] with the values 0x00, 0x4B
and 0x00 respectively.
REG[13h] Screen 2 Display Start Address Register 0
Start Address
Bit 7 Start Address
Bit 6 Start Address
Bit 5 Start Address
Bit 4 Start Address
Bit 3 Start Address
Bit 2 Start Address
Bit 1 Start Address
Bit 0
REG[14h] Screen 2 Display Start Address Register 1
Start Address
Bit 15 Start Address
Bit 14 Start Address
Bit 13 Start Address
Bit 12 Start Address
Bit 11 Start Address
Bit 10 Start Address
Bit 9 Start Address
Bit 8
REG[15h] Screen 2 Display Start Address Register 2
n/an/an/an/a
Start Address
Bit 19 Start Address
Bit 18 Start Address
Bit 17 Start Address
Bit 16