Epson S1D13504 manual Suspend Timing, Mclk

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7.4.2 Suspend Timing

SUSPEND#
Software Suspend
		t1	Note 1
CLKI		Note 2
	t2		t3
LCDPWR	Active	Inactive	Active
FPFRAME
		t4	t5
FPLINE	Active	Inactive	Active
DRDY
FPSHIFT	Active		Active
FPDAT[15:0]
	t6		t7
Memory Access	Allowed	Not Allowed	Allowed

Figure 7-18: LCD Panel Suspend Timing

Table 7-18: LCD Panel Suspend Timing

Symbol	Parameter	Min	Typ	Max	Units
t1	LCDPWR inactive to CLKI inactive	128			Frames
t2	SUSPEND# active to FPFRAME, LCDPWR inactive	0		1	Frames
t3	First CLKI after SUSPEND# inactive to FPFRAME, LCDPWR			1	Frames
	active
t4	LCDPWR inactive to FPLINE, FPSHIFT, FPDAT[15:0], DRDY			128	Frames
	active
t5	First CLKI after SUSPEND# inactive to FPLINE, FPSHIFT,	0			Frames
	FPDAT[15:0], DRDY active
t6	LCDPWR inactive to Memory Access not allowed			8	MCLK
t7	First CLKI after SUSPEND# inactive to Memory Access allowed	0			MCLK

Note

1.t3, t5, and t7 are measured from the first CLKI after SUSPEND# inactive.

2.CLKI may be active throughout SUSPEND# active.

3.Where MCLK is the period of the memory clock.

S1D13504	Hardware Functional Specification
X19A-A-002-18	Issue Date: 01/01/30