Epson Research and Development

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Vancouver Design Center

 

 

 

1 S1D13504 Power Consumption

S1D13504 power consumption is affected by many system design variables.

Input clock frequency (CLKI): the CLKI frequency determines the LCD frame-rate, CPU perfor- mance to memory, and other functions – the higher the input clock frequency, the higher the frame-rate, performance and power consumption.

CPU interface: the S1D13504 IO VDD current consumption depends on the BUSCLK frequency, data width, number of toggling pins, and other factors – the higher the BUSCLK, the higher the

CPU performance and power consumption.

Core VDD, IO VDD voltage levels: the voltage levels of the two independent VDD groups (Core, IO) affect power consumption – the higher the voltage, the higher the consumption.

Display mode: the resolution and color depth affect power consumption – the higher the resolution/color depth, the higher the consumption.

Internal CLK divide: internal registers allow the input clock to be divided before going to the internal logic blocks – the higher the divide, the lower the power consumption.

There are two power save modes in the S1D13504: Software and Hardware SUSPEND. The power consumption of these modes is also affected by various system design variables.

DRAM refresh mode, CBR or self-refresh: self-refresh capable DRAM allows the S1D13504 to disable the internal memory clock thereby saving power.

CPU bus state during SUSPEND: the state of the CPU bus signals during SUSPEND has a substantial effect on power consumption. An inactive bus (e.g. BUSCLK = low, Addr = low etc.) reduces overall system power consumption.

CLKI state during SUSPEND: disabling the CLKI during SUSPEND has substantial power savings.

Power Consumption

S1D13504

Issue Date: 01/02/02

X19A-G-006-04

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Epson manual S1D13504 Power Consumption