Epson S1D13504 Display Modes, Clock Source, Miscellaneous, Package and Pin, Name Package Pin

Epson Research and Development	Page 13
Vancouver Design Center

2.4 Display Modes

•1/2/4/8/16 bit-per-pixel modes supported on LCD.

•1/2/4/8 bit-per-pixel modes supported on CRT.

•Up to 16 shades of gray by FRM on monochrome passive LCD panels; a 16x4 Look-Up Table is used to map 1/2/4 bit-per-pixel modes into these shades.

•Up to 4096 colors on color passive LCD panels; three 16x4 Look-Up Tables are used to map 1/2/4/8 bit-per-pixel modes into these colors, 16 bit-per-pixel mode is mapped directly using the 4 most significant bits of the red, green and blue colors.

•Up to 64K colors in 16 bit-per-pixel mode on TFT panels.

•Split screen mode – allows two different images to be simultaneously displayed.

•Virtual display mode – displays images larger than the panel size through the use of panning and scrolling.

•Double buffering / multi-pages – for smooth animation and instantaneous screen update.

•Fast-Update feature – accelerates screen update by allocating full display buffer bandwidth to CPU (see REG[23h] bit 7).

2.5 Clock Source

•Single clock input for both pixel and memory clocks.

•Memory clock can be input clock or (input clock)/2 – this provides flexibility to use CPU bus clock as input clock.

•Pixel clock can be memory clock, (memory clock)/2, (memory clock)/3 or (memory clock)/4.

2.6 Miscellaneous

•The memory data bus MD[15:0], is used to configure the chip at power-on.

•Up to 12 General Purpose Input/Output pins are available:

•GPIO0 is always available.

•GPIO[3:1] are available if upper Memory Address pins are not required for DRAM support.

•GPIO[11:4] are available if there is no external RAMDAC.

•Suspend power save mode is initiated by hardware or software.

•The SUSPEND# pin is used either as an input to initiate Suspend mode, or as a General Purpose Output that can be used to control the LCD backlight – its power-on polarity is selected by an MD configuration pin.

2.7Package and Pin

Table 2-1: S1D13504 Series Package list

Name	Package	Pin
S1D13504F00A	QFP15	128
S1D13504F01A	TQFP15	128
S1D13504F02A	QFP20	144

Hardware Functional Specification	S1D13504
Issue Date: 01/01/30	X19A-A-002-18