Epson Research and Development Page 5
Vancouver Design Center
Programming Notes and Examples S1D13504
Issue Date: 01/02/01 X19A-G-002-07
List Of Tables
Table 2-1: Initializing the S1D13504 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 3-1: Pixel Storage for 1 bpp (2 Colors/Gray Shades) in One Byte of Display Buffer. . . . . . . . . . . 12
Table 3-2: Pixel Storage for 2 bpp (4 Colors/Gray Shades) in One Byte of Display Buffer. . . . . . . . . . . 12
Table 3-3: Pixel Storage for 4 bpp (16 Colors/Gray Shades) in One Byte of Display Buffer . . . . . . . . . . 13
Table 3-4: Pixel Storage for 8 bpp (256 Colors) in One Byte of Display Buffer . . . . . . . . . . . . . . . . 13
Table 3-5: Pixel Storage for 15 bpp (32768 Colors) in Two Bytes of Display Buffer. . . . . . . . . . . . . . 14
Table 3-6: Pixel Storage for 16 bpp (65536 Colors) in Two Bytes of Display Buffer. . . . . . . . . . . . . . 14
Table 3-7: Look-Up Table Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 3-8: Recommended LUT Values for 1 bpp Color Mode . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 3-9: Recommended LUT Values for 2 bpp Color Mode . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 3-10: Recommended LUT Values to Simulate VGA Default 16 Color Palette. . . . . . . . . . . . . . . 19
Table 3-11: Recommended LUT Values For 8 bpp Color Mode . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 3-12: Examples of 256 Pixel Colors Using Linear LUT . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 3-13: Recommended LUT Values for 1 bpp Gray Shades . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 3-14: Recommended LUT Values for 2 bpp Gray Shades . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 3-15: Recommended LUT Values for 8 bpp Gray Shade . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 4-1: Number of Pixels Panned Using Start Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 4-2: Active Pixel Pan Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 6-1: RAMDAC Register Mapping for Little/Big-Endian . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 6-2: Related Register Data for CRT Only . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 6-3: 8 bpp Recommended RAMDAC palette data for Simultaneous Display. . . . . . . . . . . . . . . 35
Table 6-4: Related register data for Simultaneous Display. . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 9-1: Passive Single Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 9-2: Passive Dual Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 9-3: TFT Panel. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
List of Figures
Figure 4-1: Viewport Inside a Virtual Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 4-2: 320x240 Single Panel For Split Screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28