Page 62

Epson Research and Development

Vancouver Design Center

7.3.10 FPM-DRAM Self-Refresh Timing

 

 

Stopped for

Restarted for

 

t1

suspend mode

active mode

 

 

 

Memory

 

 

 

Clock

 

 

 

 

t5

 

 

 

t2

 

 

RAS#

 

 

 

CAS#

 

 

 

t3

 

t4

 

Figure 7-16: FPM-DRAM CBR Self-Refresh Timing

Table 7-16: FPM-DRAM CBR Self-Refresh Timing

Symbol

Parameter

Min

 

Typ

Max

Units

 

 

 

 

 

 

 

t1

Memory clock

40

 

 

 

ns

 

 

 

 

 

 

t2

RAS# to CAS# precharge time (REG[22h] bits [3:2] = 00)

2 t1

 

 

ns

 

 

 

 

 

 

RAS# to CAS# precharge time (REG[22h] bits [3:2] = 01 or 10)

1 t1

 

 

 

ns

 

 

 

 

 

 

 

 

 

 

t3

CAS# precharge time (REG[22h] bits [3:2] = 00)

2 t1

 

 

ns

 

 

 

 

 

 

CAS# precharge time (REG[22h] bits [3:2] = 01 or 10)

1 t1

 

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

t4

CAS# setup time (CAS# before RAS# refresh)

0.45 t1

- 2

 

 

ns

 

 

 

 

 

 

t5

RAS# precharge time (REG[22h] bits [3:2] = 00)

2.45 t1 - 1

 

 

ns

 

 

 

 

 

 

RAS# precharge time (REG[22h] bits [3:2] = 01 or 10)

1.45 t1

- 1

 

 

ns

 

 

 

 

 

 

 

 

 

 

S1D13504

Hardware Functional Specification

X19A-A-002-18

Issue Date: 01/01/30

Page 68
Image 68
Epson S1D13504 manual FPM-DRAM Self-Refresh Timing, FPM-DRAM CBR Self-Refresh Timing