Texas Instruments TMS320DM648 manual Video Display Register Recommended Values

	4-5	Video Display Control Registers		122
	4-6	Video Display Status Register (VDSTAT) Field Descriptions		123
	4-7	Video Display Control Register (VDCTL) Field Descriptions		124
	4-8	Video Display Frame Size Register (VDFRMSZ) Field Descriptions		127
	4-9	Video Display Horizontal Blanking Register (VDHBLNK) Field Descriptions		128
	4-10	Video Display Field 1 Vertical Blanking Start Register (VDVBLKS1) Field Descriptions		129
	4-11	Video Display Field 1 Vertical Blanking End Register (VDVBLKE1) Field Descriptions		130
	4-12	Video Display Field 2 Vertical Blanking Start Register (VDVBLKS2) Field Descriptions		130
	4-13	Video Display Field 2 Vertical Blanking End Register (VDVBLKE2) Field Descriptions		131
	4-14	Video Display Field 1 Image Offset Register (VDIMGOFF1) Field Descriptions		132
	4-15	Video Display Field 1 Image Size Register (VDIMGSZ1) Field Descriptions		133
	4-16	Video Display Field 2 Image Offset Register (VDIMGOFF2) Field Descriptions		134
	4-17	Video Display Field 2 Image Size Register (VDIMGSZ2) Field Descriptions		135
	4-18	Video Display Field 1 Timing Register (VDFLDT1) Field Descriptions		136
	4-19	Video Display Field 2 Timing Register (VDFLDT2) Field Descriptions		136
	4-20	Video Display Threshold Register (VDTHRLD) Field Descriptions		137
	4-21	Video Display Horizontal Synchronization Register (VDHSYNC) Field Descriptions		138
	4-22	Video Display Field 1 Vertical Synchronization Start Register (VDVSYNS1) Field Descriptions		139
	4-23	Video Display Field 1 Vertical Synchronization End Register (VDVSYNE1) Field Descriptions		139
	4-24	Video Display Field 2 Vertical Synchronization Start Register (VDVSYNS2) Field Descriptions		140
	4-25	Video Display Field 2 Vertical Synchronization End Register (VDVSYNE2) Field Descriptions		141
	4-26	Video Display Counter Reload Register (VDRELOAD) Field Descriptions		141
	4-27	Video Display Event Register (VDDISPEVT) Field Descriptions		142
	4-28	Video Display Clipping Register (VDCLIP) Field Descriptions		143
	4-29	Video Display Default Display Value Register (VDDEFVAL) Field Descriptions		144
	4-30	Video Display Vertical Interrupt Register (VDVINT) Field Descriptions		145
	4-31	Video Display Field Bit Register (VDFBIT) Field Descriptions		146
	4-32	Video Display Field 1 Vertical Blanking Bit Register (VDVBIT1) Field Descriptions		147
	4-33	Video Display Field 2 Vertical Blanking Bit Register (VDVBIT2) Field Descriptions		147
	4-34	Video Display Register Recommended Values		148
	4-35	Video Display FIFO Registers		149
	4-36	Video Display FIFO Registers Function		149
	5-1	Video Port Registers		151
	5-2	Video Port Peripheral Identification Register (VPPID) Field Descriptions		152
	5-3	Video Port Peripheral Control Register (PCR) Field Descriptions		153
	5-4	Video Port Pin Function Register (PFUNC) Field Descriptions		154
	5-5	Video Port Pin Direction Register (PDIR) Field Descriptions		156
	5-6	Video Port Pin Data Input Register (PDIN) Field Descriptions		158
	5-7	Video Port Pin Data Out Register (PDOUT) Field Descriptions		159
	5-8	Video Port Pin Data Set Register (PDSET) Field Descriptions		161
	5-9	Video Port Pin Data Clear Register (PDCLR) Field Descriptions		162
	5-10	Video Port Pin Interrupt Enable Register (PIEN) Field Descriptions		163
	5-11	Video Port Pin Interrupt Polarity Register (PIPOL) Field Descriptions		164
	5-12	Video Port Pin Interrupt Status Register (PISTAT) Field Descriptions		165
	5-13	Video Port Pin Interrupt Clear Register (PICLR) Field Descriptions		166
	6-1	VIC Port Interface Signals		168
	6-2	Example Values for Interpolation Rate		169
	6-3	VIC Port Registers		170
	6-4	VIC Control Register (VICCTL) Field Descriptions		171
	6-5	VIC Input Register (VICIN) Field Descriptions		172
	6-6	VIC Clock Divider Register (VICDIV) Field Descriptions		173
12	List of Tables		SPRUEM1 –May 2007

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