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TMS320DM648
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TMS320DM648
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Video Port Block Diagram
Video Capture Signal Mapping1
TCI Capture Error Detection
Reset Operation
TCI Capture Features
Raw Data Capture Mode
Page 2
Image 2
2
SPRUEM1
–May
2007
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Page 1
Page 3
Page 2
Image 2
Page 1
Page 3
Contents
Users Guide
Submit Documentation Feedback
Contents
Raw Data Capture Mode
BT.656 Image Display
Video Display Registers Recommended Values
Operational Details
List of Figures
Bit BT.656 Fifo Unpacking
Video Display Event Register Vddispevt
List of Tables
Video Display Register Recommended Values
Related Documentation From Texas Instruments
About This Manual
Notational Conventions
Related Documentation From Texas Instruments
Trademarks
Overview
Video Port
Video Port Block Diagram
Video Port Fifo
Edma Interface
Video Capture Fifo Configurations
BT.656 Video Capture Fifo Configuration
Ysrca
Y/C Video Capture Fifo Configuration
Video Display Fifo Configurations
Bit Raw Video Capture Fifo Configuration
Bit Locked Raw Video Display Fifo Configuration
10. Y/C Video Display Fifo Configuration
Video Port Registers
Video Port Pin Mapping
Video Capture Signal Mapping1
Video Display Signal Mapping
Vdin Data Bus Usage for Capture Modes1
Capture Mode BT.656 Raw Data Data Bus Bit
Vdin Bus Usage for Capture Modes
VideoPort Clocking
Vdout Data Bus Usage for Display Modes
Video Port Pin Multiplexing
Vdout Data Bus Usage for Display Modes1
Video Port
Peripheral Bus Reset
Reset Operation
Power-On Reset
Software Port Reset
Interrupt Operation
Capture Channel Reset
Display Channel Reset
Edma Operation
Capture Edma Event Generation
Display Edma Event Generation
Edma Size and Threshold Restrictions
Video Port Control Registers
Edma Interface Operation
Video Port Control Registers
Acronym Register Name
Description
Video Port Control Register Vpctl
Video Port Control Register Vpctl Field Descriptions
Video Port Operating Mode Selection
Operating Mode
Video Port Status Register Vpstat
Video Port Status Register Vpstat Field Descriptions
Video Port Interrupt Enable Register Vpie
Dcna
Lfda
Video Port Interrupt Status Register Vpis
Lfda Sfda VINTA2 VINTA1 Serra Ccmpa Covra
Video Port Interrupt Status Register Vpis Field Descriptions
None Clear
Vdctl
Short field detected on channel a interrupt detected bit
Covra
BT.656 and Y/C Mode Field and Frame Operation
Video Capture Port
Video Capture Mode Selection
Video Capture Mode Selection
BT.656 Video Capture Mode
1 BT.656 Capture Channels
Error Correction by Protection Bits
BT.656 Protection Bits
3 BT.656 Image Window and Capture
Video Capture Parameters
Common Video Source Parameters
4 BT.656 Data Sampling
5 BT.656 Fifo Packing
Video Source
2 Y/C Timing Reference Codes
Y/C Video Capture Mode
1 Y/C Capture Channels
3 Y/C Image Window and Capture
Bit Y/C Fifo Packing
BT.656 and Y/C Mode Field and Frame Operation
4 Y/C Fifo Packing
Vclkina
VC xCTL Bit
BT.656 and Y/C Mode Capture Operation
Capture Determination and Notification
Operation
Vertical Synchronization Programming
Vertical Counter Reset Point
Vertical Synchronization
EAV
Vcount Operation Example EXC =
VRST=0 VRST=1 FINV=0 FINV=1 Vcount
Horizontal Synchronization Programming
Horizontal Counter Reset Point
Horizontal Synchronization
VCxCTL Bit
Field Detect Method
Field Identification
Field Identification Programming
Vclkin VSYNC# VCTL2
Short and Long Field Detect
Video Input Filtering
HSYNC# VCTL1
Chrominance Re-sampling Operation
10. Input Filter Mode Selection
Input Filter Modes
Scaling Operation
Edge Pixel Replication
2 Scaled Co-Sited Filtering
Ancillary Data Capture
11. Edge Pixel Replication
Vertical Ancillary Vanc Data Capture
Raw Data Capture Mode
Horizontal Ancillary Hanc Data Capture
Raw Data Capture Notification
Frmc
11. Raw Data Mode Capture Operation
Raw Data Fifo Packing
TCI Data Capture
TCI Capture Mode
TCI Capture Features
PCR
TCI Capture Error Detection
Synchronizing the System Clock
Vcactl Bit
12. TCI Capture Mode Operation
TCI Data Capture Notification
Clear Frmc
Perr Psterr
Writing to the Fifo
Reading from the Fifo
Capturing Video in BT.656 or Y/C Mode
Capture Line Boundary Conditions
Handling Fifo Overrun in BT.656 or Y/C Mode
Capturing Video in Raw Data Mode
Handling Fifo Overrun Condition in Raw Data Mode
Capturing Data in TCI Capture Mode
13. Video Capture Control Registers
Handling Fifo Overrun Condition in TCI Capture Mode
Video Capture Registers
Vcfld Vcxpos
Video Capture Channel x Status Register VCASTAT, Vcbstat
Fsync Frmc F2C F1C Vcypos
Description Bit
BT.656 or Y/C Mode Raw Data Mode TCI Mode
Video Capture Channel a Control Register Vcactl
Rdfe Finv EXC Fldd Vrst Hrst Vcen
None Reset
Rstch Blkcap
Lfde Sfde Resmpl
V1EAV
Eavsav Extern
Eavfid FDL
V0EAV
Value BT.656 or Y/C Mode Raw Data Mode TCI Mode
Video Capture Channel x Field 1 Start Register VCxSTRT1
Video Capture Channel x Field 1 Stop Register VCxSTOP1
Vcxstop
Video Capture Channel x Field 2 Start Register VCxSTRT2
Vcystop
Video Capture Channel x Field 2 Stop Register VCxSTOP2
26. Video Capture Channel x Field 2 Stop Register VCxSTOP2
Video Capture Channel x Vertical Interrupt Register VCxVINT
VCTHRLD2
VCTHRLD1
CAPEVTCT2
Video Capture Channel x Event Count Register VCxEVTCT
Video Capture Channel B Control Register Vcbctl
CAPEVTCT1
30. Video Capture Channel B Control Register Vcbctl
Vrst Hrst Vcen
SAV or VCTL1 inactive edge Not used
24. TCI Capture Control Register Tcictl Field Descriptions
BT.656, Y/C Mode, or Raw Data Mode TCI Mode
TCI Capture Control Register Tcictl
TCI Clock Initialization LSB Register Tciclkinitl
Inpcr
TCI System Time Clock LSB Register Tcistclkl
Bit Value Mode
TCI Clock Initialization MSB Register Tciclkinitm
Pcre Pcrm
Default Pcrm
TCI System Time Clock MSB Register Tcistclkm
Pcre
ATC
TCI System Time Clock Compare LSB Register Tcistcmpl
TCI System Time Clock Compare MSB Register Tcistcmpm
TCI System Time Clock Compare Mask MSB Register Tcistmskm
Value BT.656, Y/C Mode, or Raw Data Mode TCI Mode
TCI System Time Clock Compare Mask LSB Register Tcistmskl
Atcm
Tickct
Value BT.656, Y/C Mode, or Raw Data Mode TCI M ode
TCI System Time Clock Ticks Interrupt Register Tciticks
34. Video Capture Fifo Registers
Capture Mode Register BT.656 or Y/C Raw Data
Video Capture Fifo Registers
35. Video Capture Fifo Registers Function
Video Display Registers Recommended Values
Displaying Video in BT.656 or Y/C Mode
Video Display Field and Frame Operation
Dmode Bits Mode Description
Video Display Mode Selection
Video Display Mode Selection
Image Timing
Smpte 296M Compatible Progressive Scan Display
Interlaced Blanking Intervals and Video Areas
Video Display Counters
Progressive Blanking Intervals and Video Area
Horizontal Blanking and Horizontal Sync Timing
External Sync Operation
Sync Signal Generation
BT.656 Video Display Mode
Port Sync Operation
Display Timing Reference Codes
Fpcount Vclkout
Line Number
BT.656 Frame Timing
Line Number
525/60 Description
4 BT.656 Fifo Unpacking
Blanking Codes
3 BT.656 Image Display
Vclkout
2 Y/C Blanking Codes
Y/C Video Display Mode
1 Y/C Display Timing Reference Codes
3 Y/C Image Display
Video Output Filtering
Output Filter Mode Selection
4 Y/C Fifo Unpacking
Output Filter Modes
15. Chrominance Re-sampling
2x Co-Sited Scaling
2x Interspersed Scaling
18. Output Edge Pixel Replication
Horizontal Ancillary Hanc Data Display
Raw Data Display Mode
Ancillary Data Display
Vertical Ancillary Vanc Data Display
Raw Mode RGB Output Support
Raw Data Fifo Unpacking
Display Operation
Video Display Field and Frame Operation
Display Determination and Notification
Vdctl Bit
Video Display Event Generation
Display Line Boundary Conditions
Ipcount =IMGSIZE78
Display Timing Examples
Interlaced BT.656 Timing Example
Yfifo
Frmwidth = IMGHOFF1 =
Vclkin Fpcount Ipcount VCTL1 Hblnkac VCTL1 Hsyncac Vclkout
Flcount
112
Interlaced Raw Display Example
26. BT.656 Interlaced Display Vertical Timing Example
VCTL1 Hsyncab Vclkout
Vclkin Fpcount
Ipcount VCTL1 Hblnkab
28. Raw Interlaced Display Vertical Timing Example
3 Y/C Progressive Display Example
Hsyncstart = 1350 Hsyncstop =
VCTL1 Hblnkac VCTL1 Hsyncac Vclkout
Frmwidth = IMGHOFF1 = Hblnkstart =
30. Y/C Progressive Display Vertical Timing Example
Flcount EAV Ilcount V F
Displaying Video in BT.656 or Y/C Mode
Displaying Video in Raw Data Mode
Handling Under-run Condition of the Display Fifo
Video Display Control Registers
Video Display Registers
Video Display Status Register Vdstat
Video Display Control Register Vdctl
Video Display Status Register Vdstat Field Descriptions
BT.656 and Y/C Mode Raw Data Mode
Video Display Control Register Vdctl Field Descriptions
Video Display Control Register Vdctl Field Descriptions
None Frmdis
Value BT.656 and Y/C Mode Raw Data Mode
Blanking
None Flddis
Frmheight
Video Display Frame Size Register Vdfrmsz
Video Display Horizontal Blanking Register Vdhblnk
Frmwidth
BT.656 and Y/C Mode Raw Data Mode 31-28 Reserved
Field has no effect
VBLNKYSTOP1
VBLNKXSTOP1
VBLNKYSTART2
VBLNKXSTART2
VBLNKYSTOP2
Value BT.656 and Y/C Mode
DEFAULT0
VBLNKXSTOP2
IMGHOFF1
Video Display Field 1 Image Offset Register VDIMGOFF1
IMGVOFF1
None Negoff
IMGHSIZE1
Video Display Field 1 Image Size Register VDIMGSZ1
IMGVSIZE1
IMGHOFF2
Video Display Field 2 Image Offset Register VDIMGOFF2
IMGVOFF2
IMGVSIZE2
Video Display Field 2 Image Size Register VDIMGSZ2
Video Display Field 1 Timing Register VDFLDT1
IMGHSIZE2
FLD1XSTART
Video Display Field 2 Timing Register VDFLDT2
FLD1YSTART
FLD2YSTART
Incpix
Video Display Threshold Register Vdthrld
VDTHRLD2
VDTHRLD1
Hsyncstart
Video Display Horizontal Synchronization Register Vdhsync
Hsyncstop
VSYNCYSTOP1
VSYNCXSTART1
VSYNCYSTART1
VSYNCXSTOP1
VSYNCXSTART2
VSYNCYSTART2
Crld Hrld
Video Display Counter Reload Register Vdreload
Vrld
Crld
DISPEVT2
Video Display Event Register Vddispevt
Video Display Clipping Register Vdclip
DISPEVT1
Video Display Default Display Value Register Vddefval
Clipchigh
Defval
Video Display Vertical Interrupt Register Vdvint
Crdefval Cbdefval
Crdefval
Video Display Field Bit Register Vdfbit
56. Video Display Vertical Interrupt Register Vdvint
VBITCLR1
Fbitset
Fbitclr
VBITSET1
VBITCLR2
VBITSET2
Register Field 525/60 Value
Video Display Registers Recommended Values
34. Video Display Register Recommended Values
35. Video Display Fifo Registers
Display Mode
Video Display Fifo Registers
36. Video Display Fifo Registers Function
General-Purpose I/O Operation
Offset Address Acronym Register Name
Gpio Registers
Video Port Registers
Class Revision
Video Port Peripheral Identification Register Vppid
Type
Class
Peren
Video Port Peripheral Control Register PCR
Peren Soft Free
Stop
Video Port Pin Function Register Pfunc
Video Port Pin Function Register Pfunc Field Descriptions
Normal VDATA10TO19
Normal VDATA0TO9
Video Port Pin Direction Register Pdir
Video Port Pin Direction Register Pdir Field Descriptions
VDATA4TO7IN VDATA4TO7OUT
VDATA12TO15IN VDATA12TO15OUT
VDATA8TO9IN VDATA8TO9OUT
VDATA0T32IN VDATA0T32OUT
Video Port Pin Data Input Register Pdin
Video Port Pin Data Input Register Pdin Field Descriptions
PDOUT9 PDOUT8 PDOUT7 PDOUT6 PDOUT5 PDOUT4 PDOUT3 PDOUT2
Video Port Pin Data Output Register Pdout
Video Port Pin Data Out Register Pdout Field Descriptions
PDOUT22
When writing data, writes to PDOUT20 bit
Video Port Pin Data Set Register Pdset
Video Port Pin Data Set Register Pdset Field Descriptions
Video Port Pin Data Clear Register Pdclr
Video Port Pin Data Clear Register Pdclr Field Descriptions
PIEN22
Video Port Pin Interrupt Enable Register Pien
PIEN9 PIEN8 PIEN7 PIEN6 PIEN5 PIEN4 PIEN3 PIEN2
Video Port Pin Interrupt Polarity Register Pipol
Value Description
None VCTL3INT
Video Port Pin Interrupt Status Register Pistat
PISTAT22
None VCTL2INT
PICLR22
Video Port Pin Interrupt Clear Register Piclr
PICLR9 PICLR8 PICLR7 PICLR6 PICLR5 PICLR4 PICLR3 PICLR2
Vcxo Interpolated Control Port
Overview
VIC Port Interface Signals
VIC Port Signal Direction Description
Interface
Operational Details
Example Values for Interpolation Rate
VIC Port Registers
Enabling VIC Port
VIC Port Registers
VIC Control Register Vicctl
VIC Control Register Vicctl Field Descriptions
Vicinbits
VIC Input Register Vicin
VIC Input Register Vicin Field Descriptions
Vicclkdiv
VIC Clock Divider Register Vicdiv
VIC Clock Divider Register Vicdiv Field Descriptions
Rfid
Products Applications
DSP
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