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Video Display Registers
Table 4-7.  Video Display Control Register (VDCTL) Field Descriptions (continued)
  | 
  | 
  | 
  | Description | |
Bit  | field (1) | symval (1)  | Value | BT.656 and Y/C Mode | Raw Data Mode | 
11  | DVEN  | OF(value) | 
  | Default value enable bit.  | 
  | 
  | 
  | DEFAULT  | 0  | Blanking value is output during  | Not used.  | 
  | 
  | 
  | 
  | 
  | |
  | 
  | BLANKING | 
  | 
  | 
  | 
  | 
  | DV  | 1  | Default value is output during  | Not used.  | 
  | 
  | 
  | 
  | 
  | |
10  | RESMPL  | OF(value) | 
  | Chroma   | 
  | 
  | 
  | DEFAULT  | 0  | 
  | Not used.  | 
  | 
  | DISABLE  | 
  | Chroma   | 
  | 
  | 
  | ENABLE  | 1  | Chroma is horizontally   | Not used.  | 
  | 
  | 
  | 
  | 4:2:0 interspersed to 4:2:2   | 
  | 
  | 
  | 
  | 
  | output.  | 
  | 
9  | Reserved  | -  | 0  | Reserved. The reserved bit location is always read as 0. A value written to this field  | |
  | 
  | 
  | 
  | has no effect.  | 
  | 
8  | SCALE | OF(value) | 
  | Scaling select bit.  | 
  | 
  | 
  | DEFAULT  | 0  | No scaling.  | Not used.  | 
  | 
  | NONE  | 
  | 
  | 
  | 
  | 
  | X2  | 1  | 2 × scaling.  | Not used.  | 
7  | CON(2)  | OF(value) | 
  | Continuous display enable bit.  | 
  | 
  | 
  | DEFAULT  | 0  | Continuous display is disabled.  | 
  | 
  | 
  | DISABLE  | 
  | 
  | 
  | 
  | 
  | ENABLE  | 1  | Continuous display is enabled.  | 
  | 
6  | FRAME(2)  | OF(value) | 
  | Display frame bit.  | 
  | 
  | 
  | DEFAULT  | 0  | Do not display frame.  | 
  | 
  | 
  | NONE | 
  | 
  | 
  | 
  | 
  | FRMDIS | 1  | Display frame.  | 
  | 
5  | DF2(2)  | OF(value) | 
  | Display field 2 bit.  | 
  | 
  | 
  | DEFAULT  | 0  | Do not display field 2.  | 
  | 
  | 
  | NONE | 
  | 
  | 
  | 
  | 
  | FLDDIS | 1  | Display field 2.  | 
  | 
4  | DF1(2)  | OF(value) | 
  | Display field 1 bit.  | 
  | 
  | 
  | DEFAULT  | 0  | Do not display field 1.  | 
  | 
  | 
  | NONE  | 
  | 
  | 
  | 
  | 
  | FLDDIS  | 1  | Display field 1.  | 
  | 
3  | Reserved  | -  | 0  | Reserved. The reserved bit location is always read as 0. A value written to this field  | |
  | 
  | 
  | 
  | has no effect.  | 
  | 
DMODE  | OF(value) | Display mode select bit.  | 
  | ||
  | 
  | DEFAULT  | 0  | Enables   | 
  | 
  | 
  | BT656B  | 
  | 
  | 
  | 
  | 
  | RAWB  | 2h  | Enables   | 
  | 
  | 
  | YC16  | 4h  | Enables   | 
  | 
  | 
  | RAW16 | 6h  | Enables   | 
  | 
(2)For complete encoding of these bits, see Table 
126  | Video Display Port  | SPRUEM1   | 
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