Texas Instruments TMS320DM648 Video Port Pin Interrupt Polarity Register Pipol, Value Description

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GPIO Registers

5.1.10 Video Port Pin Interrupt Polarity Register (PIPOL)

The PIPOL determines the GPIO pin signal polarity that generates an interrupt.

The video port pin interrupt polarity register (PIPOL) is shown in Figure 5-10and described in Table 5-11.

Figure 5-10. Video Port Pin Interrupt Polarity Register (PIPOL)

31							24
			Reserved
				R-0
23	22	21	20	19	18	17	16
Reserved	PIPOL22	PIPOL21	PIPOL20	PIPOL19	PIPOL18	PIPOL17	PIPOL16
R-0	R/W-0	R/W-0	R/W-0	R/W-0	R/W-0	R/W-0	R/W-0
15	14	13	12	11	10	9	8
PIPOL15	PIPOL14	PIPOL13	PIPOL12	Reserved	Reserved	PIPOL9	PIPOL8
R/W-0	R/W-0	R/W-0	R/W-0	R-0	R-0	R/W-0	R/W-0
7	6	5	4	3	2	1	0
PIPOL7	PIPOL6	PIPOL5	PIPOL4	PIPOL3	PIPOL2	Reserved	Reserved
R/W-0	R/W-0	R/W-0	R/W-0	R/W-0	R/W-0	R-0	R-0

LEGEND: R/W = Read/Write; R = Read only; -n= value after reset

Table 5-11. Video Port Pin Interrupt Polarity Register (PIPOL) Field Descriptions

Bit	field (1)	symval (1)
31-23	Reserved	-
22	PIPOL22	OF(value)
		DEFAULT
		VCTL3ACTHI
		VCTL3ACTLO
21	PIPOL21	OF(value)
		DEFAULT
		VCTL2ACTHI
		VCTL2ACTLO
20	PIPOL20	OF(value)
		DEFAULT
		VCTL1ACTHI
		VCTL1ACTLO
19-2	PIPOL[19-2]	OF(value)

DEFAULT

VDATAnACTHI

VDATAnACTLO

Value Description

0Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.

PIPOL22 bit determines the VCTL3 pin signal polarity that generates an interrupt.

0Interrupt is caused by a low-to-high transition on the VCTL3 pin.

1 Interrupt is caused by a high-to-low transition on the VCTL3 pin.

PIPOL21 bit determines the VCTL2 pin signal polarity that generates an interrupt.

0Interrupt is caused by a low-to-high transition on the VCTL2 pin.

1 Interrupt is caused by a high-to-low transition on the VCTL2 pin.

PIPOL20 bit determines the VCTL1 pin signal polarity that generates an interrupt.

0Interrupt is caused by a low-to-high transition on the VCTL1 pin.

1 Interrupt is caused by a high-to-low transition on the VCTL1 pin.

PIPOL[19-2] bit determines the corresponding VDATA[n] pin signal polarity that generates an interrupt.

0Interrupt is caused by a low-to-high transition on the VDATA[n] pin.

1 Interrupt is caused by a high-to-low transition on the VDATA[n] pin.

(1)For CSL implementation, use the notation VP_PIPOL_PIPOLn_symval.

164	General-Purpose I/O Operation	SPRUEM1 –May 2007
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