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GPIO Registers

Table 5-5. Video Port Pin Direction Register (PDIR) Field Descriptions (continued)

Bit

field (1)

symval (1)

Value

Description

12

PDIR12

OF(value)

 

PDIR12 bit controls the direction of the VDATA[15–12] pins.

 

 

DEFAULT

0

Pins function as input.

 

 

VDATA12TO15IN

 

 

 

 

VDATA12TO15OUT

1

Pins function as output.

11-9

Reserved

-

0

Reserved. The reserved bit location is always read as 0. A value written to this

 

 

 

 

field has no effect.

8

PDIR8

OF(value)

 

PDIR8 bit controls the direction of the VDATA[9-8] pins.

 

 

DEFAULT

0

Pins function as input.

 

 

VDATA8TO9IN

 

 

 

 

VDATA8TO9OUT

 

Pins function as output.

7-5

Reserved

-

0

Reserved. The reserved bit location is always read as 0. A value written to this

 

 

 

 

field has no effect.

4

PDIR4

OF(value)

 

PDIR4 bit controls the direction of the VDATA[7-4] pins.

 

 

DEFAULT

0

Pins function as input.

 

 

VDATA4TO7IN

 

 

 

 

VDATA4TO7OUT

1

Pins function as output.

3-1

Reserved

-

0

Reserved. The reserved bit location is always read as 0. A value written to this

 

 

 

 

field has no effect.

0

PDIR0

OF(value)

 

PDIR0 bit controls the direction of the VDATA[3-2] pins.

 

 

DEFAULT

0

Pins function as input.

 

 

VDATA0T32IN

 

 

 

 

VDATA0T32OUT

1

Pins function as output.

SPRUEM1 –May 2007

General-Purpose I/O Operation

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Texas Instruments TMS320DM648 manual VDATA12TO15IN VDATA12TO15OUT, VDATA8TO9IN VDATA8TO9OUT, VDATA4TO7IN VDATA4TO7OUT