Texas Instruments TMS320DM648 manual Video Display Fifo Registers Function, Display Mode

Models: TMS320DM648

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Video Display FIFO Registers

4.14 Video Display FIFO Registers

The display FIFO mapping registers are listed in Table 4-35. These registers provide EDMA write access to the display FIFOs. These pseudo-registers should be mapped into DSP memory space rather than configuration register space in order to provide high-speed access. See the device-specific datasheet for the memory address of these registers.

The function of the video display FIFO mapping registers is listed in Table 4-36.

Table 4-35. Video Display FIFO Registers

Offset Address (1)

Acronym

Register Name

80h

YDSTA

Y FIFO Destination Register A

a0h

CBDSTA

Cb FIFO Destination Registern A

c0h

CRDSTA

Cr FIFO Destination Register A

80h

YDSTB

Y FIFO Destination Register B

a0h

CBDSTB

Cb FIFO Destination Register B

c0h

CRDSTB

Cr FIFO Destination Register B

(1)The absolute address of the registers is device/port specific and is equal to the FIFO base address + offset address. See the device-specific datasheet to verify the register addresses.

Table 4-36. Video Display FIFO Registers Function

 

 

Display Mode

Register

BT.656 or Y/C

Raw Data

YDSTx

Maps Y display FIFO into the DSP memory.

Maps data display buffer into the DSP memory.

CBDST

Maps Cb display FIFO into the DSP memory.

Not used.

CRDST

Maps Cr display FIFO into the DSP memory.

Not used.

In BT.656 or Y/C display mode, three EDMAs move data from the DSP memory to Y, Cb, and Cr display FIFOs by using the memory-mapped YDSTx, CBDST, and CRDST registers. The EDMA transfers are triggered by the YEVT, CbEVT, and CrEVT events, respectively.

In raw display mode, one EDMA channel moves data from the DSP memory to the Y display FIFO by using the memory-mapped YDSTx register. The EDMA transfers are triggered by a YEVT event.

The video display FIFO registers are write-only locations. Reads of these addresses returns arbitrary values and do not affect the status of the display FIFOs.

SPRUEM1 –May 2007

Video Display Port

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Texas Instruments TMS320DM648 manual Video Display Fifo Registers Function, Display Mode, BT.656 or Y/C Raw Data