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Contents
Preface |
| 13 | ||
1 | Overview | 16 | ||
1.1 | Video Port | 17 | ||
1.2 | Video Port FIFO | 19 | ||
| 1.2.1 | EDMA Interface | 19 | |
| 1.2.2 Video Capture FIFO Configurations | 20 | ||
| 1.2.3 Video Display FIFO Configurations | 23 | ||
1.3 | Video Port Registers | 25 | ||
1.4 | Video Port Pin Mapping | 26 | ||
| 1.4.1 VDIN Bus Usage for Capture Modes | 27 | ||
| 1.4.2 VDOUT Data Bus Usage for Display Modes | 28 | ||
1.5 | Video Port Pin Multiplexing | 28 | ||
1.6 | VideoPort Clocking | 28 | ||
2 | Video Port | 29 | ||
2.1 | Reset Operation | 30 | ||
| 2.1.1 | 30 | ||
| 2.1.2 | Peripheral Bus Reset | 30 | |
| 2.1.3 | Software Port Reset | 30 | |
| 2.1.4 | Capture Channel Reset | 31 | |
| 2.1.5 | Display Channel Reset | 31 | |
2.2 | Interrupt Operation | 31 | ||
2.3 | EDMA Operation | 32 | ||
| 2.3.1 Capture EDMA Event Generation | 32 | ||
| 2.3.2 Display EDMA Event Generation | 33 | ||
| 2.3.3 EDMA Size and Threshold Restrictions | 33 | ||
| 2.3.4 | EDMA Interface Operation | 34 | |
2.4 | Video Port Control Registers | 34 | ||
| 2.4.1 Video Port Control Register (VPCTL) | 35 | ||
| 2.4.2 Video Port Status Register (VPSTAT) | 37 | ||
| 2.4.3 Video Port Interrupt Enable Register (VPIE) | 38 | ||
| 2.4.4 Video Port Interrupt Status Register (VPIS) | 40 | ||
3 | Video Capture Port | 45 | ||
3.1 | Video Capture Mode Selection | 46 | ||
3.2 | BT.656 Video Capture Mode | 46 | ||
| 3.2.1 | BT.656 Capture Channels | 46 | |
| 3.2.2 BT.656 Timing Reference Codes | 46 | ||
| 3.2.3 BT.656 Image Window and Capture | 48 | ||
| 3.2.4 | BT.656 Data Sampling | 49 | |
| 3.2.5 | BT.656 FIFO Packing | 49 | |
3.3 | Y/C Video Capture Mode | 50 | ||
| 3.3.1 | Y/C Capture Channels | 50 | |
| 3.3.2 Y/C Timing Reference Codes | 50 | ||
SPRUEM1 |
| Table of Contents | 3 |