Texas Instruments TMS320DM648 manual Video Port Pin Interrupt Enable Register Pien, PIEN22

www.ti.com

GPIO Registers

5.1.9 Video Port Pin Interrupt Enable Register (PIEN)

The GPIOs can be used to generate DSP interrupts or EDMA events. The PIEN selects which pins may be used to generate an interrupt. Only pins whose corresponding bits in PIEN are set may cause their corresponding PISTAT bit to be set.

Interrupts are enabled on a GPIO pin when the corresponding bit in PIEN is set, the pin is enabled for GPIO in PFUNC, and the pin is configured as an input in PDIR.

The video port pin interrupt enable register (PIEN) is shown in Figure 5-9and described in Table 5-10.

Figure 5-9. Video Port Pin Interrupt Enable Register (PIEN)

31							24
				Reserved
				R-0
23	22	21	20	19	18	17	16
Reserved	PIEN22	PIEN21	PIEN20	PIEN19	PIEN18	PIEN17	PIEN16
R-0	W-0	W-0	W-0	W-0	W-0	W-0	W-0
15	14	13	12	11	10	9	8
PIEN15	PIEN14	PIEN13	PIEN12	Reserved	Reserved	PIEN9	PIEN8
W-0	W-0	W-0	W-0	R-0	R-0	W-0	W-0
7	6	5	4	3	2	1	0
PIEN7	PIEN6	PIEN5	PIEN4	PIEN3	PIEN2	Reserved	Reserved
W-0	W-0	W-0	W-0	W-0	W-0	R-0	R-0

LEGEND: R/W = Read/Write; R = Read only; -n= value after reset

Table 5-10. Video Port Pin Interrupt Enable Register (PIEN) Field Descriptions

Bit	field (1)	symval (1)	Value	Description
31-23	Reserved	-	0	Reserved. The reserved bit location is always read as 0. A value written to this field
				has no effect.
22	PIEN22	OF(value)		PIEN22 bit enables the interrupt on the VCTL3 pin.
		DEFAULT	0	Interrupt is disabled.
		VCTL3LO
		VCTL3HI	1	Pin enables the interrupt.
21	PIEN21	OF(value)		PIEN21 bit enables the interrupt on the VCTL2 pin.
		DEFAULT	0	Interrupt is disabled.
		VCTL2LO
		VCTL2HI	1	Pin enables the interrupt.
20	PIEN20	OF(value)		PIEN20 bit enables the interrupt on the VCTL1 pin.
		DEFAULT	0	Interrupt is disabled.
		VCTL1LO
		VCTL1HI	1	Pin enables the interrupt.
19-2	PIEN[19-2]	OF(value)		PIEN[19-2] bits enable the interrupt on the corresponding VDATA[n] pin.
		DEFAULT	0	Interrupt is disabled.
		VDATAnLO
		VDATAnHI	1	Pin n enables the interrupt.

(1)For CSL implementation, use the notation VP_PIEN_PIENn_symval

SPRUEM1 –May 2007	General-Purpose I/O Operation	163
Submit Documentation Feedback