Texas Instruments TMS320DM648 manual TCI System Time Clock MSB Register Tcistclkm, Pcre Pcrm

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Video Capture Registers

Figure 3-34. TCI System Time Clock LSB Register (TCISTCLKL)

31 0

PCR

R/W-0

LEGEND: R/W = Read/Write; R = Read only; -n= value after reset

Table 3-27. TCI System Time Clock LSB Register (TCISTCLKL) Field Descriptions

				Description
Bit	field	symval (1)	Value	BT.656, Y/C Mode, or Raw Data Mode	TCI Mode
31-0	PCR	OF(value)	0-FFFF FFFFh	Not used.	Contains the 32 LSBs of the program
					clock reference.
		DEFAULT	0

(1)For CSL implementation, use the notation VP_TCISTCLKL_PCR_symval

3.13.15 TCI System Time Clock MSB Register (TCISTCLKM)

The transport stream interface system time clock MSB register (TCISTCLKM) contains the most-significant bit (MSB) of the program clock reference (PCR) and the 9 bits of the PCR extension. The system time clock value is obtained by reading TCISTCLKM and TCISTCLKL.

The PCRE value changes at a 27-MHz rate and is probably not reliably read by the DSP. The PCRM bit normally changes at a 10.5-μHz rate (every 26 hours).

The TCI system time clock MSB register (TCISTCLKM) is shown in Figure 3-35and described in Table 3-28.

Figure 3-35. TCI System Time Clock MSB Register (TCISTCLKM)

31				16
			Reserved
			R-0
15	10	9	1	0
	Reserved		PCRE	PCRM
	R-0		R/W-0	R/W-0

LEGEND: R/W = Read/Write; R = Read only; -n= value after reset

Table 3-28. TCI System Time Clock MSB Register (TCISTCLKM) Field Descriptions

					Description
	field (1)	symval (1)		BT.656, Y/C Mode, or Raw Data	TCI Mode
Bit			Value	Mode
31-10	Reserved	-	0	Reserved. The reserved bit location is always read as 0. A value written to this
				field has no effect.
9-1	PCRE	OF(value)	0-1FFh	Not used.	Contains the extension portion of the
					program clock reference.
		DEFAULT	0
0	PCRM	OF(value)	0-1	Not used.	Contains the MSB of the program
					clock reference.
		DEFAULT	0

(1)For CSL implementation, use the notation VP_TCISTCLKM_field_symval

SPRUEM1 –May 2007	Video Capture Port	87
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