Texas Instruments TMS320DM648 TCI Clock Initialization MSB Register Tciclkinitm, Bit Value Mode

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Video Capture Registers

3.13.13 TCI Clock Initialization MSB Register (TCICLKINITM)

The transport stream interface clock initialization MSB register (TCICLKINITM) is used to initialize the hardware counter to synchronize with the system time clock. .

On receiving the first packet containing a program clock reference (PCR) header, the DSP writes the most-significant bit (MSB) of the PCR and the 9-bit PCR extension into TCICLKINITM. This initializes the counter to the system time clock. TCICLKINITM should also be updated by the DSP whenever a discontinuity in the PCR field is detected.

To ensure synchronization and prevent false compare detection, the software should disable the system time clock interrupt (clear the STEN bit in TCICTL) prior to writing to TCICLKINITM. All bits of the system time counter are initialized whenever either TCICLKINITL or TCICLKINITM are written.

The TCI clock initialization MSB register (TCICLKINITM) is shown in Figure 3-33and described in Table 3-26

Figure 3-33. TCI Clock Initialization MSB Register (TCICLKINITM)

31				16
			Reserved
			R-0
15	10	9	1	0
	Reserved		INPCRE	INPCRM
	R-0		R/W-0	R/W-0

LEGEND: R/W = Read/Write; R = Read only; -n= value after reset

Table 3-26. TCI Clock Initialization MSB Register (TCICLKINITM) Field Descriptions

					Description
	field (1)	symval (1)		BT.656, Y/C Mode, or Raw Data	TCI Mode
Bit			Value	Mode
31-10	Reserved	-	0	Reserved. The reserved bit location is always read as 0. A value written to this
				field has no effect.
9-1	INPCRE	OF(value)	0-1FFh	Not used.	Initializes the extension portion of the
					system time clock.
		DEFAULT	0
0	INPCRM	OF(value)	0-1	Not used.	Initializes the MSB of the system time
					clock.
		DEFAULT	0

(1)For CSL implementation, use the notation VP_TCICLKINITM_field_symval

3.13.14 TCI System Time Clock LSB Register (TCISTCLKL)

The transport stream interface system time clock LSB register (TCISTCLKL) contains the 32 least-significant bits (LSBs) of the program clock reference (PCR). The system time clock value is obtained by reading TCISTCLKL and TCISTCLKM.

TCISTCLKL represents the current value of the 32 LSBs of the base PCR that normally counts at a 90-kHz rate. Since the system time clock counter continues to count, the DSP may need to read TCISTCLKL twice in a row to ensure an accurate value.

The TCI system time clock LSB register (TCISTCLKL) is shown in Figure 3-34and described in Table 3-27.

86 Video Capture Port SPRUEM1 –May 2007

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